WAT process to avoid wiring defects

Details WAT process to avoid wiring defects WAT process to avoid wiring defects

2007-05-22

2007-05-22

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S475000, C438S513000, C257SE21304, C257SE21521

Reexamination Certificate

active

11106120

ABSTRACT:
A method for forming a multi-level semiconductor device to eliminate conductive interconnect protrusions following a WAT test, the method including forming a first metallization layer; carrying out a wafer acceptance testing (WAT) process; and, then carrying out a chemical mechanical polish (CMP) on the metallization layer.

REFERENCES:
patent: 6358831 (2002-03-01), Liu et al.
patent: 6638867 (2003-10-01), Liu et al.
patent: 6642153 (2003-11-01), Chang et al.
patent: 6660630 (2003-12-01), Chang et al.
patent: 6746954 (2004-06-01), Lee
patent: 6812156 (2004-11-01), Day et al.

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