Warp-free semiconductor wafer, and devices using the same

Details Warp-free semiconductor wafer, and devices using the same Warp-free semiconductor wafer, and devices using the same

2011-07-19

2011-07-19

Landau, Matthew C (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Heterojunction formed between semiconductor materials which...

C257S192000, C257SE29248, C257SE29249, C438S094000

Reexamination Certificate

active

07982242

ABSTRACT:
A semiconductor wafer to be diced into individual SBDs, HEMTs or MESFETs has a substrate with a main semiconductor region and counter semiconductor region formed on its opposite surfaces. The main semiconductor region is configured to provide the desired semiconductor devices. In order to counterbalance the warping effect of the main semiconductor region on the substrate, as well as to enhance the voltage strength of the devices made from the wafer, the counter semiconductor region is made similar in configuration to the main semiconductor region. The main semiconductor region and counter semiconductor region are arranged in bilateral symmetry as viewed in a cross-sectional plane at right angles with the substrate surfaces.

REFERENCES:
patent: 5145793 (1992-09-01), Oohara et al.
patent: 5412226 (1995-05-01), Rejman-Greene et al.
patent: 6147370 (2000-11-01), Kanamori
patent: 7276799 (2007-10-01), Lee et al.
patent: 2005-158889 (2005-06-01), None

Affiliated with

Also associated with

Rating

Warp-free semiconductor wafer, and devices using the same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Warp-free semiconductor wafer, and devices using the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Warp-free semiconductor wafer, and devices using the same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2675807