Wait mode power reduction system and method for data processor

Details Wait mode power reduction system and method for data processor Wait mode power reduction system and method for data processor

1987-10-13

1988-10-25

Shaw, Gareth D.

Boots, shoes, and leggings

364707, G06F 104

Patent

active

047808438

ABSTRACT:
A method and apparatus for reducing power consumption in a data processing system by interrupting the supply of clocking pulses to selected portions of the system in response to a power-down signal provided by a data processing portion of the system only if the state of a respective control signal indicates that that particular portion of the system is then disabled or otherwise inhibited from interrupting the operation of the data processing portion.

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