Wafer with semiconductor chips mounted thereon

Details Wafer with semiconductor chips mounted thereon Wafer with semiconductor chips mounted thereon

2005-11-22

2005-11-22

Thai, Luan (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

C257S632000, C257S620000, C257S774000

Reexamination Certificate

active

06967389

ABSTRACT:
A semiconductor chip module and forming method is provided. The module includes a support member having at least one well being open to receive a semiconductor chip. Each well depth is substantially equal to the thickness of a chip. The support member has a planar region surrounding each well. A chip is in each well. A dielectric sheet of material is laminated over each chip and extends onto the planar area surrounding the wells and has a face oriented away from the chip. Electrical circuitry including capture pads is formed on the face of the dielectric sheet and extends onto the sheet that overlies the planar region. Conducting vias are formed in the dielectric sheet connecting the electrical circuitry on the dielectric sheet with the contact pads on the chip. A multilayer, circuitized laminate having a fan-out pattern is laminated to the dielectric sheet.

REFERENCES:
patent: 5492586 (1996-02-01), Gorczyca
patent: 6004867 (1999-12-01), Kim et al.
patent: 6181569 (2001-01-01), Chakravorty
patent: 6221694 (2001-04-01), Bhatt et al.
patent: 6229216 (2001-05-01), Ma et al.
patent: 6271469 (2001-08-01), Ma et al.
patent: 6312972 (2001-11-01), Blackshear
patent: 403165036 (1991-07-01), None
patent: 11220061 (1999-08-01), None
IBM Technical Disclosure Bulletin entitled “Flatpack Package Using Core Metal Layer of Composite Substrate as Ground Plane”, Mar., 1991.

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