Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor
Reexamination Certificate
2004-12-09
2008-11-25
Nguyen, Cuong Q (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
C257S620000
Reexamination Certificate
active
07456489
ABSTRACT:
In a wafer (1) with a number of exposure fields (2), each of which exposure fields comprises a number of lattice fields (3) with an IC (4) located therein, two groups (5, 7) of saw paths (6, 8) are provided and two control module fields (A1, A2, B1, B2, C1, C2, D1, D2) are assigned to each exposure field, each of which control module fields contains at least one optical control module (OCM-A1, OCM-A2, OCM-B1, OCM-B2, OCM-C1, OCM-C2, OCM-D1, OCM-D2) and lies within the exposure field in question and comprises a plurality of control module field sections (A11, A12. . . AIN and A21, A22. . . A2N and B11, B12. . . B1N and B21, B22. . . B2N and C1N and C2N and D1N and D2N) and is distributed among several lattice grids (3), wherein each control module field section (A11to D2N) is located in a lattice field and contains at least one control module component (10,11,12,13,14,15,16,17,18).
REFERENCES:
patent: 6114072 (2000-09-01), Narimatsu
patent: 2003/0211700 (2003-11-01), Leung et al.
patent: 59 094418 (1984-05-01), None
patent: WO 02/069389 (2002-09-01), None
Nguyen Cuong Q
NXP B.V.
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