Wafer test method utilizing conductive interposer

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S761010

Reexamination Certificate

active

07057405

ABSTRACT:
A wafer test method is performed for a wafer prior to forming bumps on the wafer, using a conductive interposer having one side with test pads and the other side with test bumps electrically connected to the test pads. The conductive interposer is mounted on the wafer having a plurality of chips, wherein the test bumps are in electrical contact with bond pads on active surfaces of the chips. Test probes are used to contact the test pads to perform tests for the chips. This wafer test method is beneficially performed prior to forming bumps on the wafer, such that the prior-art drawback of damaging bumps on the wafer by contacting test probes with the bumps on the wafer can be eliminated, and the conductive interposer mounted on the wafer prevents the test probes from physical contact with the bond pads on the chips, thereby not damaging the bond pads.

REFERENCES:
patent: 5374893 (1994-12-01), Koopman et al.
patent: 5559446 (1996-09-01), Sano
patent: 5703494 (1997-12-01), Sano
patent: 5759047 (1998-06-01), Brodsky et al.
patent: 5786701 (1998-07-01), Pedder
patent: 6614246 (2003-09-01), Kohno et al.

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