Wafer splitting method using cleavage

Details Wafer splitting method using cleavage Wafer splitting method using cleavage

2002-11-29

2004-03-02

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

C438S461000, C438S462000, C438S463000

Reexamination Certificate

active

06699774

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to a method of manufacturing a semiconductor device, and more specifically, to a method of splitting a wafer, on which semiconductor devices have been formed, into individual chips.
2. Description of the Related Art
During a process of manufacturing a semiconductor device, a wafer on which all elements have been formed is split along dicing lines or chip splitting lines and thus divided into a plurality of chips (also referred to as “dies” or “pellets”). These chips are stuck to an adhesive sheet, and sequentially picked up therefrom. Further steps to complete the manufacturing of the semiconductor devices may include a step of mounting each chip on a lead frame and a TAB tape or a step of sealing the chip into a package.
In recent years, there has been a demand for reduction in the thickness of chips which allows for thinner packages. One way to reduce the thickness of chips is to grind or etch the back surface of a wafer. However, thinner wafers are likely to break during conveyance between various manufacturing steps (manufacturing apparatuses), and cracking or chipping is likely to occur during dicing.
As a method of solving this problem, a manufacturing method called “dicing-before-grinding” has been proposed.
FIGS. 1A and 1B
to
FIGS. 7A
to
7
B sequentially show steps of dividing a wafer, on which all elements have been formed, into individual chips using the method of dicing-before-grinding.
FIGS. 1A
to
7
A are perspective views, and
FIGS. 1B
to
7
B are sectional views.
With the dicing-before-grinding method, various semiconductor elements
22
are first formed in a main surface region of a wafer
21
. Then, an element-formed surface
21
A of the wafer is diced along dicing lines or chip splitting lines using a diamond blade
23
or the like to form grooves
24
A and
24
B of a depth slightly greater than the desired thickness (achieved upon completion) of chips (see
FIGS. 1A and 1B
to FIGS.
4
A and
4
B). Subsequently, a surface protection film
25
is stuck to the element-formed surface
21
A of the wafer
21
(FIGS.
5
A and
5
B). A wheel
26
with a grindstone is rotated to grind a back surface
21
B of the wafer
21
to split the wafer into individual chips
27
while thinning the wafer
21
(FIGS.
6
A and
6
B). Then, the ground back surface
21
B of the chip
27
is mirror-finished by polishing or the like as required to remove streaks resulting from the back surface grinding (FIGS.
7
A and
7
B).
However, the dicing-before-grinding method serves to remove the streaks on the back surfaces of the chips
27
, but fails to remove streaks that may be created on the sides of the chips
27
during dicing or chipping. Thus, the bending strength (or breaking strength) of the chips unavoidably decreases as a result of stress concentration. This in turn leads to cracking of the chips during pick-up or resin-sealing.
As a technique of avoiding this problem, a method has been proposed which comprises wet etching after the back surface of the wafer has been ground. However, this method serves to remove the streaks on the sides of chips but not the chipping on the element-formed surface. Further, a method has been proposed which comprises RIE (Reactive Ion Etching) instead of dicing to form grooves. However, the depth of the grooves that can be formed by RIE is only about 100 &mgr;m. This limits the thickness of chips to which this method is applicable.
As described above, the conventional semiconductor manufacturing method using the dicing-before-grinding method leaves much room for improvement because it fails to sufficiently remove streaks that may be created on the sides of chips or chipping that may be formed on the element-formed surface.
Further, several improvements have been proposed but are limited in certain points. Consequently, they are not sufficient to form intended thin chips.
BRIEF SUMMARY OF THE INVENTION
According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the method comprising forming notches in an element-formed surface of a wafer on which semiconductor elements have been formed; sticking a surface protection tape to the element-formed surface of the wafer; cleaving the wafer along a crystal orientation using the notches as starting points; and grinding a back surface of the wafer.


REFERENCES:
patent: 5888883 (1999-03-01), Sasaki et al.
patent: 6184109 (2001-02-01), Sasaki et al.
patent: 6257224 (2001-07-01), Yoshino et al.
patent: 6294439 (2001-09-01), Sasaki et al.
patent: 6337258 (2002-01-01), Nakayoshi et al.
patent: 2002/0019074 (2002-02-01), Nakazawa et al.
Shinya Takyu et al., “Semiconductor Device Manufacturing Method for Reinforcing Chip by Use of Seal Member at Pickup Time”, US patent application Ser. No. 10/187,629, filed on Jul. 3, 2002.
Kazuhiro Takahashi et al., “Surface Protective Sheet For Use In Wafer Back Grinding And Method Of Use Thereof”, U.S. patent application No. 09/387,705 filed Aug. 18, 1999, US patent 6,465,330.

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