Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Patent
1998-08-10
2000-08-15
Picardat, Kevin M.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
438462, 438637, H01L 2144
Patent
active
061035521
ABSTRACT:
A process and a package for achieving wafer scale packaging is described. A layer of a polymeric material, such as polyimide, silicone elastomer, or benzocyclobutene is deposited on the surface of a chip. Via holes through this layer connect to the top surfaces of the studs that pass through the passivating layer of the chip. In one embodiment, the polymeric layer covers a redistribution network on a previously planarized surface of the chip. Individual chip-level networks are connected together in the kerf so that conductive posts may be formed inside the via holes through electroplating. After the formation of solder bumps, the wafer is diced into individual chips thereby isolating the individual redistribution networks. In a second embodiment, no redistribution network is present so electroless plating is used to form the posts. In a third embodiment, there is also no redistribution network but electroplating is made possible by using a contacting layer. Solder bumps attached to the posts are then formed by means of electroless plating, screen or stencil printing.
REFERENCES:
patent: 5239191 (1993-08-01), Sakumoto et al.
patent: 5514613 (1996-05-01), Santadrea et al.
patent: 5530418 (1996-06-01), Hsu et al.
patent: 5731222 (1998-03-01), Malloy et al.
patent: 5837557 (1998-11-01), Fulford, Jr. et al.
patent: 5851911 (1998-12-01), Farnworth
patent: 5897337 (1999-04-01), Kata et al.
patent: 5958800 (1999-09-01), Yu et al.
patent: 5994783 (1999-11-01), You
M. Hou, "Wafer level packaging for CSPS" Semiconductor International, Jul. 1998, p. 305-308.
Ackerman Stephen B.
Picardat Kevin M.
Saile George O.
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