Wafer scale burn-in apparatus and process

Details Wafer scale burn-in apparatus and process Wafer scale burn-in apparatus and process

1996-06-07

1998-11-03

Nguyen, Vinh P.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324765, G01R 106

Patent

active

058314458

ABSTRACT:
An apparatus for wafer scale burn-in and testing of semiconductor integrated circuits and a method for its utilization is disclosed. A wafer is mated to a printed circuit board which electrically contacts the pads on each die using small conductive pillars. Single precise alignment of entire wafer within apparatus allows for testing all the dice on the wafer in parallel, eliminating need to probe each die individually. The apparatus is fitted with heating elements and cooling channels to generate the necessary wafer temperatures for burn-in and testing. The method of utilization eliminates processing of defective dice beyond burn-in and test, thereby increasing throughput.

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patent: 5047711 (1991-09-01), Smith et al.
patent: 5123850 (1992-06-01), Elder et al.
patent: 5198752 (1993-03-01), Miyata et al.
patent: 5210485 (1993-05-01), Kreiger et al.
patent: 5302891 (1994-04-01), Wood et al.
patent: 5325052 (1994-06-01), Yamashita

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