Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2000-06-20
2003-07-29
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
With measuring or testing
C438S462000, C438S017000, C414S935000, C414S936000
Reexamination Certificate
active
06599763
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to wafer handling in a semiconductor processing plant and, more particularly, to reducing cycle time in wafer processing by eliminating interim wafer sorting operations as wafers move through a multiple chamber processing tool.
BACKGROUND OF THE INVENTION
Some manufacturing processes require that the item being processed be rotated regularly in order to ensure that the item is properly processed, such as when painting an object or when applying a coating to a substrate. In the case of a mechanical process, the object is rotated to ensure that the tooling is being worn evenly or that the tooling is mechanically treating the object evenly. Even though some of these items may be individually processed, or processed in small lots, the items may form part of a larger lot being manufactured and it is difficult to distinguish the progress of the individual item as it moves through the processing line. As the number of processing steps increase tracking becomes even more difficult. This is particularly a problem in the processing of wafers in a semiconductor processing plant.
A conventional semiconductor fabrication plant typically includes multiple fabrication areas or bays interconnected by a path, such as a conveyor belt. Each bay generally includes the requisite fabrication tools (interconnected by a subpath) to process semiconductor wafers for a particular purpose, such as photolithography, chemical-mechanical polishing or chemical vapor deposition, for example. Material stockers or stocking tools generally lie about the plant and store semiconductor wafers waiting to be processed. Each material stocker typically services two or more bays and can hold hundreds of cassettes. The wafers are usually stored in cassettes in groups of about 25 wafers. The wafers are then disposed within a carrier and move from one process to another in the carrier. The carriers are usually tracked by their carrier code by a computer system as they move through the plant.
Once a lot has been retrieved, and the equipment has been set up, the operation on the wafers by a particular piece of equipment, or “tool,” can begin. At this point, the lot is “moved-in” to the operation. An operator on the line then communicates this information to the host computer. The lot remains in this state until the operation is completed. Once the operation is completed, the operator must perform tests and verifications on the wafers. When all tests and verifications have been performed, the host computer application program must be notified. Wafers may have moved from one cassette to another as a result of the operation; therefore the host application and computer has to be notified of these moves. The operator then places the cassette of “moved-out” wafers in the material stocker to await orders as to the location of the next piece of equipment that will perform operations on the wafers.
The semiconductor fabrication plant, including the bays, material stockers and the interconnecting path, typically operates under control of a distributed computer system running a factory management program. In this environment, the automated material handling system (AMHS) may conceptually include the cassettes, the transportation system (e.g., paths) and control system (e.g., the distributed computer system). An empty carrier management system as well as a separate test wafer management system may also form part of the AMHS.
Data gathered during the course of wafer processing is used to diagnose yield problems and forms the basis of yield improvement efforts. Such data includes parametric electrical test data gathered on individual circuits and test structures fabricated on the wafers, as well as wafer sort data which tests the suitability for use of the wafers once wafer processing is completed. One of the possible sources of yield variation is the order in which wafers in a lot are processed at a given processing step. When the processing is done one wafer at a time per step, a variation in yield may be caused by a build up of contaminants, uneven heating of a processing chamber or another physical aspect that changes during the processing of the lot. In a batch operation, the physical location of the wafer in the batch processing equipment may influence uniformity of the processing effects across the lot. In an example where wafers are moving through a contaminated chamber, if the order in which each wafer is processed is known then the final wafer yield may be plotted against the processing order in this step. For each wafer in a lot a drop-off in yield versus processing order would be observed due to the contamination problem. This data is used to make adjustments to the line to improve yield; however, this wafer tracking method lacks the level of precision in the data collected required by chip plants today.
In tracking the wafer processing order, wafer sorters have been used to read scribed wafer identifiers, either immediately prior to or after critical processing steps. Sorters typically read the scribe marks to ensure that the wafers and the cassette are properly matched together as the wafers move through the semiconductor processing line. The scribe marks on the wafers usually comprise a series of characters formed in the wafer substrate that serve as an identifier. Since integrated circuits should not be formed on the scribe marks, the scribe marks are typically positioned near the unused outer edge of the wafer to maximize usable wafer surface area.
Randomizing the order of the wafers prior to such steps is often done to ensure certain processing effects are not compounded. The wafer positional data is fed into a computer system, the device performance metrics for a wafer lot of interest are manually entered, and then all possible graphs of the device metrics for that lot versus wafer processing order at each step are generated. The data is then reviewed to determine those steps at which the processing order may affect performance. This type of approach to tracking wafers can be costly in its implementation due to the amount of hardware and software needed to both randomize the wafer order and interface with the wafer processing system's main computer database.
SUMMARY OF THE INVENTION
The present invention is directed to addressing the above and other needs in connection with reducing wafer processing cycle times as the wafers move through a multiple chamber processing tool. According to one aspect of the invention, it has been discovered that wafer sorting operations proximate to a processing location having a multiple chamber processing tool (or cluster tool) can be eliminated by conducting wafer verification and cassette slot randomization of a set of wafers while at the processing location.
According to one aspect of the invention, a method of processing a set of wafers in a wafer processing system includes providing each of the wafers with a scribe code thereon. Each of the wafers is then presented to a first processing location, the processing location having at least one processing chamber. The scribe code on each wafer is read as the wafer is being placed into the at least one processing chamber. Each of the wafers in the at least one processing chamber is processed and the set of wafers is randomized as they are removed from the first processing location and placed into a wafer cassette.
According to another aspect of the invention, a system for processing wafers in a wafer processing system includes a set of wafers having a scribe code thereon and an arrangement for presenting each of the wafers to a first processing location, the first processing location having at least one processing chamber. An arrangement for reading the scribe code on each wafer as the wafer is being placed into the at least one processing chamber is also included. An arrangement for randomizing the set of wafers as they are removed from the first processing location and placed into a wafer cassette is included.
In yet another aspect of the invention, an apparatus for pro
McCarthy Michael
Reyes Jose Carlos
Winters Toby
Advanced Micro Devices , Inc.
Everhart Caridad
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