Wafer level testing

Details Wafer level testing Wafer level testing

2011-08-16

2011-08-16

Nguyen, Vinh P (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S750300

Reexamination Certificate

active

07999566

ABSTRACT:
A wafer comprises a kerf region and a test chip. The kerf is a region in a wafer designated to be destroyed by chip dicing. The test chip is located within the kerf region and is configured to provide parametric data for a wafer fabrication process of a head. The test chip comprises a shield portion of a first shield layer electrically coupled to an element, a first pad within a second shield layer electrically coupled to the element, and a second pad within the second shield layer electrically coupled to the shield portion.

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