Wafer-level test and burn-in, and semiconductor process

Metal working – Method of mechanical manufacture – Electrical device making

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Details

29842, 29874, 228179, 324756, 439 56, 439 66, 439591, H01R 900

Patent

active

060323566

ABSTRACT:
Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150.degree. C., and can be completed in less than 60 minutes.

REFERENCES:
patent: 4955523 (1990-09-01), Carlomango et al.
patent: 5059899 (1991-10-01), Fornworth et al.
patent: 5189507 (1993-02-01), Carlomango et al.
patent: 5389556 (1995-02-01), Rustoker et al.
patent: 5476211 (1995-12-01), Khandro
patent: 5513430 (1996-05-01), Yanof et al.
patent: 5585282 (1996-12-01), Wood et al.
patent: 5601740 (1997-02-01), Eldridge et al.
patent: 5640762 (1997-06-01), Fornworth et al.
patent: 5665654 (1997-09-01), Stansbury
patent: 5726580 (1998-03-01), Wood et al.
patent: 5806181 (1998-09-01), Khandros et al.

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