Wafer level super stretch solder

Details Wafer level super stretch solder Wafer level super stretch solder

2005-05-10

2005-05-10

Chaudhari, Chandra (Department: 2813)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S117000, C438S613000

Reexamination Certificate

active

06890795

ABSTRACT:
We disclose a technique to generate stretched solder columns (bumps) at the wafer level, suitable for wafer level packaging. This is accomplished through use of using two wafers—the standard (functional) wafer that contains the integrated circuits and a master (dummy) wafer on whose surface is provided an array of solder bumps that is the mirror image of that on the functional wafer. After suitable alignment, both sets of solder bumps are melted and then slowly brought together till they merge. Then, as they cool, they are slowly pulled apart thereby stretching the merged solder columns. Once the latter have fully solidified, they are separated from the master wafer only.

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