Fishing – trapping – and vermin destroying
Patent
1988-01-27
1990-02-27
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437227, 437209, 437211, H01L 2178, H01L 2180
Patent
active
049046101
ABSTRACT:
A process for fabricating a multiplicity of semiconductor devices comprises the steps of applying electrodes to both faces of a semiconductor wafer, the mounting the semiconductor wafer to a substrate by means of an intervening layer of wax which bonds to the substrate and to the wafer. The wafer is then divided by grooves which extend through the wafer and at least partially through the layer of wax. The grooves are filled with a flexible resin that bonds to and passivates the edges of the chips, and the resin is subsequently cured. Next, the wax is removed from the cured resin and chips to provide a discrete flexible unit separate from the substrate. The discrete unit is divided into cells, each of which includes one of the chips for subsequent fabrication into a completed semiconductor device.
REFERENCES:
patent: 3689993 (1972-09-01), Tolar
patent: 3756872 (1973-09-01), Goodman
patent: 3860448 (1975-01-01), Konantz et al.
patent: 3891483 (1975-06-01), Messerschmidt et al.
patent: 3913217 (1975-10-01), Misawa et al.
patent: 4075049 (1978-02-01), Wood
patent: 4224101 (1980-09-01), Tijburg et al.
patent: 4623693 (1986-11-01), Inoue et al.
patent: 4740477 (1988-04-01), Einthoven et al.
Chaudhuri Olik
General Instrument Corporation
Lipsitz Barry R.
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