Wafer level packaged MEMS integrated circuit

Details Wafer level packaged MEMS integrated circuit Wafer level packaged MEMS integrated circuit

2008-09-19

2010-12-14

Clark, Jasmine J (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S693000, C257S704000, C257S347000, C257SE23067, C257SE23128

Reexamination Certificate

active

07851925

ABSTRACT:
A wafer-level packaged integrated circuit includes a semiconductor substrate including a first silicon layer. A micro-electromechanical system (MEMS) device is integrated into the first silicon layer. A thin-film deposited sealing member is deposited over the first silicon layer and is configured to seal a cavity in the first silicon layer. At least one additional layer is formed over the sealing member. At least one under bump metallization (UBM) is formed over the at least one additional layer.

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