Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2006-06-20
2006-06-20
Chambliss, Alonzo (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S713000, C257S717000, C257S720000, C361S709000, C361S712000
Reexamination Certificate
active
07064428
ABSTRACT:
A wafer-level package structure, applicable to a flip-chip arrangement on a carrier, which comprises a plurality of contact points, is described. This wafer-level package structure is mainly formed with a chip and a conductive layer. The conductive layer is arranged on the bonding pads of the chip as contact points. The conductive layer can further be arranged at a region outside the bonding pads on the chip as a heat sink to enhance the heat dissipation ability of the package.
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U.S. Appl. No. 60/318,271.
Chen Jau-Shoung
Chou Yu-Chen
Fang Jen-Kuang
Huang Min-Lung
Lee Chun-Chi
Advanced Semiconductor Engineering Inc.
Chambliss Alonzo
Jianq Chyun IP Office
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