Wafer level package configured to compensate size difference...

Details Wafer level package configured to compensate size difference... Wafer level package configured to compensate size difference...

2006-12-29

2009-12-08

Chambliss, Alonzo (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S707000, C257S713000, C257S717000, C257S720000, C257SE23051, C257SE23101, C438S122000

Reexamination Certificate

active

07629682

ABSTRACT:
A wafer level package including a semiconductor chip having a plurality of bonding pads on a front surface thereof; a lower insulation layer formed on the semiconductor chip to expose the bonding pads; re-distribution lines formed on the lower insulation layer to be connected to the bonding pads at first ends thereof; an upper insulation layer formed on the lower insulation layer including the re-distribution lines, with portions of the re-distribution lines exposed; solder balls attached to the exposed portions of the re-distribution lines; and a cap covering a rear surface of the semiconductor chip.

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