Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2002-04-12
2003-10-21
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S050000, C438S108000
Reexamination Certificate
active
06635509
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to Micro-Electro-Mechanical-Systems (MEMS) and more particularly to a wafer level MEMS packaging technique which prevents processing related micro-contamination.
BACKGROUND
The manufacturing of Micro-Electro-Mechanical-Systems (MEMS) such as micro-gyroscopes, micro-accelerometers, resonant accelerometers, micro-mirrors, micro-motors, micro-actuators and other such micro-devices, for automotive, photonics, information technology and bio-mechanical markets, integrating at least one moving and/or particular component causes a very serious challenge for packaging because:
Some MEMS-based devices require the encapsulation to be done before dicing, as to be protected against micro-contamination from particles and dicing slurry while being processed like a standard semiconductor chip, without the need for dedicated equipment or processes for dicing, mounting and molding procedures inside the cleanrooms.
Changes in atmospheric conditions can change the capacitance readout of micro-gyroscopes and micro-accelerometers without any changes in acceleration and because an increased relative humidity can increase stiction of their moving parts, it is necessary to encapsulate their moving and/or particular components in vacuum or in a controlled atmosphere.
Most MEMS-based resonant accelerometers, most MEMS-based RF switching devices and other such MEMS devices have very serious Q-factor degradation when exposed to an ambient pressure exceeding 1 Pa. Their moving MEMS components require a vacuum packaging to a residual pressure of less then 1 Pa as to ensure a reliable service during its complete projected life.
To ensure these functions, the moving and/or particular component should be enclosed in a sealed micro-cavity under a vacuum of less then 1 Pa.
PRIOR ART
A first example of protective packaging is provided in
FIG. 1
taken from the following cited Prior Art reference:
U.S. Pat. No. 5,589,082 titled ‘Microelectromechanical signal processor to fabrication’ (The Regents of the University of California).
The micro-cavity described in U.S. Pat. No. 5,589,082 is used to protect a micro-mechanical resonator and is formed using a vacuum sealed silicon nitride micro-shell fabricated by:
Properly micromachining the micro-mechanical resonator to a certain fabrication step;
Depositing a 7.0 &mgr;m thick phosphosilicate (PSG) layer over the micromachined micro-mechanical resonator;
Patterning the 7.0 &mgr;m thick PSG layer into an isolated island covering the moving and/or particular component of the micromachined micro-mechanical resonator and defining the shape of the micro-shell;
Depositing an extra 1.0 &mgr;m thick PSG layer;
Patterning the lateral etch-channels at the periphery of the isolated island of
FIG. 1
;
Depositing an extra 1.0 &mgr;m thick LPCVD low-stress silicon nitride;
Patterning the lateral etch holes in the silicon nitride located at the periphery of the isolated island;
Release of the micro-mechanical resonator using concentrated HF penetration through the lateral etch holes formed at the periphery of the isolated island of all sacrificial material located under and over (7.0 &mgr;m thick PSG layer) the moving and/or particular component of the micromachined micro-mechanical resonator, leaving the formed 1.0 &mgr;m thick LPCVD low-stress silicon nitride micro-shell intact;
Sealing of the lateral etch holes formed at the periphery of the formed micro-shell using a 2.0 &mgr;m thick layer of silicon nitride deposited over the suspended 1.0 &mgr;m thick LPCVD low-stress silicon nitride micro-shell, as to form a 3.0 &mgr;m thick LPCVD low-stress silicon nitride micro-shell.
As indicated in the patent at column 11, lines 7-12, the release of the micro-mechanical resonator using concentrated HF through the lateral etch holes formed at the periphery of the silicon micro-shell limits the size of the micro-device to about 500 &mgr;m×500 &mgr;m due to:
Incomplete sacrificial material removal away from the periphery of the micro-shell;
Collapse of the 3.0 &mgr;m thick LPCVD low-stress silicon nitride micro-shell upon exposure to atmospheric pressure.
A second example of protective packaging is provided in
FIG. 2
taken from the following cited Prior Art reference:
U.S. Pat. No. 5,668,033 titled ‘Method for manufacturing a semiconductor acceleration sensor device’.
The packaging technique of U.S. Pat. No. 5,668,033, used to fabricate the packaging structure covering the acceleration sensor uses gold-silicon (case where a silicon-on-insulator substrate is used) or gold-polysilicon eutectic bonding technique.
This technique requires the bonding of two substrates.
A third example of protective packaging is provided in
FIG. 3
taken from the following cited Prior Art reference:
U.S. Pat. No. 5,783,749 titled ‘Vibrating disk type micro-gyroscope’ (Electronics and telecommunications research Institute).
The packaging technique of U.S. Pat. No. 5,783,749, used to fabricate the vacuum sealed packaging structure covering the gyroscope as to maintain a 1 mTorr pressure to enhance its sensitivity and to minimise air damping, uses an unknown bonding technique.
This technique also requires the bonding of two elements, i.e. of a sealed structure and of a substrate, as indicated in column 3D, lines 25-31.
A fourth example of protective packaging is provided in
FIG. 4
taken from the following cited Prior Art reference:
U.S. Pat. No. 5,952,572 titled ‘Angular rate sensor and acceleration sensor’ (Matsushita Electric Industrial Co., Ltd.).
The three substrates composing the angular rate sensor described in U.S. Pat. No. 5,952,572 are bonded together as a sandwich structure using anodic bonding, as mentioned in column 7, lines 36-41. This anodic bonding requires the silicon and glass substrates to be heated at 300-400° C. in vacuum while a negative voltage of about 1000V in terms of reference potential of the silicon substrate is applied to the glass substrates. As mentioned in column 7, lines 55-58, a Zr—V—Fe/Ti non-volatile getter material is also integrated in the sealed cavity as to maintain the vacuum quality.
This technique also requires the bonding of two substrates.
A fifth example of such protective packaging is provided in
FIG. 5
taken from the following cited Prior Art reference which also review the Prior Art in microsensor's packaging, as of April of 1997:
U.S. Pat. No. 6,140,144 titled ‘Method for packaging microsensors’ (Integrating Sensing Systems, Inc.).
The two substrates composing the microsensors described in U.S. Pat. No. 6,140,144 are bonded together via flip chip bonding using an underfill material as to maintain a controlled pressure/controlled environment around the sensing element, as mentioned in column 3, lines 48-50.
This technique also requires the bonding of two substrates.
A sixth example of such protective packaging is provided in
FIG. 6
taken from the following cited Prior Art reference:
U.S. Pat. No. 6,232,150 titled ‘Process for making microstructures and microstructures made thereby’ (The Regents of the University of Michigan).
The two substrates composing the microstructures described in U.S. Pat. No. 6,232,150 are bonded together using a localised micro-heater flip chip bonding using a bonding material and a metal-based localised resistive micro-heater capable of locally heating the bonding material as to provoke the bonding of the two substrates, as mentioned in column 4, lines 25-35.
This technique also requires the bonding of two substrates.
A seventh example of such protective packaging is provided in
FIG. 7
taken from the following cited Prior Art reference;
U.S. Pat. No. 6,265,246 titled ‘Microcap wafer-level package’ (Agilent Technologies, Inc.).
The base wafer integrating a micro-device described in U.S. Pat. No. 6,265,246 is bonded to a matching cap wafer using cold welding of the bonding pad gaskets of the cap wafer to the periphery of the bonding pads of the base wafer integrating the micro-device. The arrangement assures an hermetic seal of the wafer-level package and electrical connection
(Marks & Clerk)
Dalsa Semiconductor Inc.
Elms Richard
Owens Beth E.
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