Wafer level fabrication and assembly of chip scale packages

Details Wafer level fabrication and assembly of chip scale packages Wafer level fabrication and assembly of chip scale packages

1998-05-21

1999-12-28

Bowers, Charles

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

438110, 257727, 257794, H01L 2144

Patent

active

060080701

ABSTRACT:
A method for producing integrated circuit devices comprises the steps of forming and packaging such devices at the wafer scale, including forming a plurality of chip circuits with bond pads, adhesively fixing a plate of glass to the active surface of the wafer, slicing the wafer, applying a sealant layer to the backside of the wafer, forming contact holes through the upper glass plate, metallizing the glass plate and singulating the individual chips. Use of etchable glass for the package and palladium for metallization provides an advantageous construction method.

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