Wafer level chip scale package system with a thermal...

Details Wafer level chip scale package system with a thermal... Wafer level chip scale package system with a thermal...

2011-05-10

2011-05-10

Roman, Angel (Department: 2812)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S113000, C438S118000, C438S122000, C257S707000, C257S783000, C257SE21001

Reexamination Certificate

active

07939368

ABSTRACT:
A wafer level chip scale package system is provided forming a wafer having an interconnect provided on an active side, forming a thermal sheet having a first thermal interface material layer and a thermal conductive layer, and attaching the thermal sheet on a non-active side of the wafer.

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