Wafer dryer system for PRS wet bench

Drying and gas or vapor contact with solids – Process – Gas or vapor pressure is subatmospheric

Reexamination Certificate

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C034S107000, C034S201000, C134S102300, C134S095200

Reexamination Certificate

active

06792693

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to wet benches for removing photoresist polymer particles from WIP (work-in-process) semiconductor wafers after a wet etching process in the semiconductor fabrication industry. More particularly, the present invention relates to a wafer dryer system for drying a WIP wafer in the event of wet bench malfunction or shutdown.
BACKGROUND OF THE INVENTION
Generally, the process for manufacturing integrated circuits on a silicon wafer substrate typically involves deposition of a thin dielectric or conductive film on the wafer using oxidation or any of a variety of chemical vapor deposition processes; formation of a circuit pattern on a layer of photoresist material by photolithography; placing a photoresist mask layer corresponding to the circuit pattern on the wafer; etching of the circuit pattern in the conductive layer on the wafer; and stripping of the photoresist mask layer from the wafer. Each of these steps, particularly the photoresist stripping step, provides abundant opportunity for organic, metal and other potential circuit-contaminating particles to accumulate on the wafer surface.
In the semiconductor fabrication industry, minimization of particle contamination on semiconductor wafers increases in importance as the integrated circuit devices on the wafers decrease in size. With the reduced size of the devices, a contaminant having a particular size occupies a relatively larger percentage of the available space for circuit elements on the wafer as compared to wafers containing the larger devices of the past. Moreover, the presence of particles in the integrated circuits compromises the functional integrity of the devices in the finished electronic product. Currently, mini-environment based IC manufacturing facilities are equipped to control airborne particles much smaller than 1.0 &mgr;m, as surface contamination continues to be of high priority to semiconductor manufacturers. To achieve an ultra clean wafer surface, particles must be removed from the wafer, and particle-removing methods are therefore of utmost importance in the fabrication of semiconductors.
The most common system for cleaning semiconductor wafers during wafer processing includes a series of tanks which contain the necessary cleaning solutions and are positioned in a “wet bench” in a clean room. Batches of wafers are moved in sequence through the tanks, typically by operation of a computer-controlled automated apparatus. Currently, semiconductor manufacturers use wet cleaning processes which may use cleaning agents such as deionized water and/or surfactants. Other wafer-cleaning processes utilize solvents, dry cleaning using high-velocity gas jets, and a megasonic cleaning process, in which very high-frequency sound waves are used to dislodge particles from the wafer surface. Cleaning systems which use deionized (DI) water currently are widely used in the industry because the systems are effective in removing particles from the wafers and are relatively cost-efficient. Approximately 4.5 tons of water are used for the production of each 200-mm, 16-Mbit, DRAM wafer.
A schematic of a typical conventional wet bench system for removing photoresist polymers from semiconductor wafers is generally indicated by reference numeral
8
in FIG.
1
. As a first step in the processing sequence, a set or lot of wafers (not shown), having previously been subjected to a photoresist process, is initially placed in a first acid wet clean chamber
10
, in which the wafers are subjected to an acid solution, such as ACT690, to remove much of the polymer material from the wafer. Next, the wafers are transferred from the first acid wet clean chamber
10
to a second acid wet clean chamber
12
, in which the wafers are again subjected to an acid such as ACT 690 to remove the remaining polymer residues from the wafers. The wafers are then transferred to a base clean chamber
14
, in which a base such as NMP is applied to the wafers to neutralize the acid thereon. The wafers are then transferred to a QDR (quick dump rinse) chamber
16
, and then to an ISO (isolation) bath chamber
18
, in each of which the base previously applied to the wafers in the base clean chamber
14
is rinsed off the wafer using DI (deionized) water. Finally, the wafers are transferred to a spin dryer chamber
20
, in which the wafers are rotated at high speeds to dry the rinse water from the wafers.
A problem commonly encountered in routine operation of the wet bench system
8
is that the system
8
, including the wafer transfer mechanism thereof, may fail due to any of a number of reasons. When this occurs, the wafers in transit through the wet bench system
8
, unable to progress to the spin dryer chamber
20
, may be delayed at either the QDR chamber
16
or the ISO bath chamber
18
. Accordingly, the metal components in the devices on the wafers must remain in contact with rinse water standing on the wafers for prolonged periods of time. The standing water on the wafers forms pits in the metal interconnects and other components on the wafers. Consequently, the yield of devices on the wafers is significantly reduced, and the affected wafers must be scrapped.
One technique which has been used to prevent prolonged exposure of the wafers at the rinsing step in the wet bench system
8
in the event of system malfunction or shutdown involves transferring the affected wafers to a separate wet bench system
8
for continuation of the drying process in the spin dryer chamber
20
thereof. However, in the event that the second wet bench system is loaded with wafers, there is a significant delay before the second system is available to receive and dry the affected rinsed wafers from the first system. Accordingly, a wafer dryer system is needed for drying wafers at the wafer rinsing stage in the event of a wet bench system failure or malfunction.
An object of the present invention is to provide a wafer dryer system for drying wet wafers in the event of system malfunction or shutdown.
Another object of the present invention is to provide a wafer dryer system which significantly enhances the yield of devices on a wafer.
Still another object of the present invention is to provide a wafer dryer system which prevents scrapping of wafers due to system malfunction in a wet bench system for removing photoresist polymers from substrates.
Yet another object of the present invention is to provide a wafer drying system which may be adapted to dry wafers in a variety of semiconductor fabrication processes.
A still further object of the present invention is to provide a wafer drying system for reducing or preventing formation of metal line pits in metal interconnects and other components in devices on a substrate.
Yet another object of the present invention is to provide a wafer drying system which reduces the costs associated with processing substrates in the fabrication of semiconductor integrated circuits.
SUMMARY OF THE INVENTION
In accordance with these and other objects and advantages, the present invention is generally directed to a wafer dryer system which is suitable for drying rinse water from substrates in the event of a system malfunction or failure during or after rinsing of the substrates. The wafer dryer system typically includes a pair of drying chambers, each of which is fitted with at least one nitrogen gas inlet, at least one IPA gas inlet and an exhaust opening. A wafer boat which holds multiple wet wafers from an interrupted rinsing process typically in a wet bench system is placed in one of the chambers, after which the chamber is filled with hot nitrogen gas and mixed IPA gas to dry the wafers in the wafer boat. Upon resumption of operation of the wet bench system from which the wafers were taken or upon availability of a second wet bench system, the dried wafers are removed from the chamber for continued rinsing, as necessary.


REFERENCES:
patent: 5964958 (1999-10-01), Ferrell et al.
patent: 5988189 (1999-11-01), Mohindra et al.
patent: 6412501 (2002-07-01), Onoda et al.

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