Wafer dicing system

Details Wafer dicing system Wafer dicing system

2008-06-17

2008-06-17

Nguyen, Vincent Q (Department: 2858)

Electricity: measuring and testing

Impedance, admittance or other quantities representative of...

Lumped type parameters

C257S048000, C029S603090

Reexamination Certificate

active

07388385

ABSTRACT:
A wafer is formed with metal traces that extend a distance across the wafer on opposite sides of a saw street. The resistances of the metal traces, which can each be formed from one or more layers of metal, are measured before the saw street is cut. During and after the saw street is cut, the resistances of the metal traces are again measured, even continuously. The pre-cut, during-cut, and post-cut resistances are compared to determine if the wafer has been cut without damage to the wafer due to misalignment or a worn cutting device.

REFERENCES:
patent: 4477484 (1984-10-01), Paoletti et al.
patent: 4772774 (1988-09-01), Lejeune et al.
patent: 4908576 (1990-03-01), Jackson
patent: 6133582 (2000-10-01), Osann et al.
patent: 6558974 (2003-05-01), Hosier et al.
patent: 6630685 (2003-10-01), Lunde
patent: 6799976 (2004-10-01), Mok et al.
patent: 6809378 (2004-10-01), Byrd et al.

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