Wafer comprising optoelectronic circuits and method of verifying

Details Wafer comprising optoelectronic circuits and method of verifying Wafer comprising optoelectronic circuits and method of verifying

1998-02-16

1999-09-07

Williams, Alexander Oscar

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

With peripheral feature due to separation of smaller...

257 48, 257 82, 257203, 257734, 257786, 257784, 438 17, 438 15, 324760, 324765, 324 731, H01L 2166, H01L 2348, H01L 3300, G02B 612

Patent

active

059491299

ABSTRACT:
A wafer (10) is described comprising several integrated optoelectronic circuits of a first type (11), such circuits of the first type each comprising electronic modules (13) and at least a first photodiode (14).
Said wafer (10) is characterised in that it further comprises at least one integrated optoelectronic circuit of a second type (21) comprising electronic modules (23), at least one second photodiode (24) and at least one bonding pad (25) intended to be connected to an external measuring apparatus, said at least one bonding pad (25) being superposed onto said at least one second photodiode (24) so that said at least one circuit (21) of the second type may be used as a circuit for verifying the manufacturing of said wafer.

REFERENCES:
patent: 5357121 (1994-10-01), Miyashita et al.
patent: 5500540 (1996-03-01), Jewell et al.
patent: 5557170 (1996-09-01), Martin et al.
patent: 5712504 (1998-01-01), Yano et al.
patent: 5793115 (1998-08-01), Zwrczky et al.
patent: 5818984 (1998-10-01), Ahmad et al.
"Third Level Metal Diagnostic Image", 2244 Research Disclosure, (Sep. 1988), No. 293, p. 659, New York, NY, USA.

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