Wafer coating and singulation method

Details Wafer coating and singulation method Wafer coating and singulation method

2002-09-11

2003-11-18

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S114000, C438S462000, C438S465000

Reexamination Certificate

active

06649445

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to a wafer-level method of providing an underfill material on flip chip integrated circuits. More particularly, the present invention relates to a method in which a bumped wafer is partially diced prior to the application of a polymeric underfill material.
BACKGROUND OF THE INVENTION
There are a number of conventional processes for packaging integrated circuits. One approach which is commonly referred to as “flip chip” packaging generally contemplates forming solder bumps (or other suitable contacts) directly on the contact pads formed on an integrated circuit die. The die is then typically attached to a substrate such as a printed circuit board so that the die contacts directly connect to corresponding contacts on the substrate. The solder bumps are then reflowed to electrically connect the die to the substrate. When a flip chip is attached to the substrate, an air gap typically remains between flip chip and substrate. This gap is commonly filled with material that is flowed into the gap in liquid form and then solidified. This material is typically a mixture of a resin and small silica spheres and is generally referred to as underfill, as it fills the gap under the chip. The underfill material is applied in liquid form from a dispenser at one edge of the flip chip. The underfill material then flows into the air gap and spreads across the flip chip until finally the entire area of the gap between flip chip and substrate is filled.
There are problems associated with underfill. For example, the application of underfill must be repeated for each flip chip, and repeating this operation many times adds to the cost of manufacture. Also, as the underfill material flows past solder bumps to fill the gap, separation of glass from resin may occur. This segregation of silica and resin alters the mechanical properties of the filled region and thereby negates the mechanical function of the underfill.
Recently, advances have been made which improve and streamline the underfill process. One method that has shown some commercial interest involves dispensing underfill before assembling the flip chip to the board. While simplifying the flip chip process, it still requires extra steps and cannot be run on a standard surface mount assembly line. Another approach to solving these problems appears in U.S. Pat. No. 6,323,062 where a method for applying an underfill and edge coating to a flip chip is described. The method includes the steps of adhering a bumped wafer to an expandable carrier substrate, sawing the wafer to form individual chips, stretching the carrier substrate in a bidirectional manner to form channels between each of the individual chips, applying an underfill material to the bumped surfaces of the chips and around the edges of the chips, cutting the underfill material in the channels between the chips and removing the individual, underfill coated chips from the carrier. Unfortunately, this method suffers from the need to precisely control the bidirectional stretching of the carrier film, which is difficult to implement, and introduces new issues such as out of plane die.
In spite of the numerous advantages provided by flip chip technology, a need still exists for a lower cost underfill application process for flip chips which simplifies the application of the critical underfill, and reduces the number of process steps required.


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