Wafer carrier head for prevention of unintentional...

Abrading – Machine – Rotary tool

Reexamination Certificate

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Details

C451S398000

Reexamination Certificate

active

06206770

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention is directed, in general, to a semiconductor wafer polishing apparatus and, more specifically, to a wafer carrier head designed to prevent accidental rotation of the semiconductor wafer within the carrier head during chemical/mechanical planarization.
BACKGROUND OF THE INVENTION
Chemical/mechanical planarization (CMP) is an essential process in the manufacture of semiconductor chips today. During CMP, the combination of chemical etching and mechanical abrasion produces the required flat, precise surface for subsequent depositions. In the CMP process, the semiconductor wafer is retained in a circular carrier head and pressed against a polyurethane polishing pad covered with a chemical slurry. The pressure exerted on the wafer, the rates of rotation of the platen and the carrier head, the chemical composition of the slurry, the temperature of the environment, and the condition of the polishing pad are all closely controlled. The object is to have a repeatable, consistent process each time so that each wafer is as close as possible to an exact copy of every other wafer.
Therefore, every effort is made in semiconductor manufacture to tightly control all factors of the process in order to insure uniformity of the product. However, one problem has arisen that has not been addressed to date. That is, the semiconductor wafer is retained within the carrier head by a carrier ring that prevents the wafer from exiting the carrier head under the effects of the rotary motion of polishing. The rotation of the carrier head or the rotation of the polishing platen and pad can cause the wafer to exit the carrier head if it is not restrained by the carrier ring. Therefore, these forces may combine to cause the wafer to rotate within the carrier head in a random manner, thereby jeopardizing process repeatability. As each wafer rotates within the individual carrier head at a different rate or amount, the effect is to introduce variability in the CMP process and in the final product. This, of course, increases device failure rates and costs.
Accordingly, what is needed in the art is a device and method for preventing unwanted rotation of the semiconductor wafer within the carrier head during chemical/mechanical planarization.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, the present invention provides a method of manufacturing an integrated circuit using a polishing head in a semiconductor wafer polishing apparatus. In one embodiment, the polishing head comprises a wafer carrier head and a protuberance coupled to the wafer carrier head. The wafer carrier head has a back surface that contacts the wafer when it is positioned within the carrier head and a carrier ring depends from the carrier head to form an annulus. The annulus has an inner surface, which is typically an inner surface of the carrier ring, and it forms a cavity with the wafer carrier head that is configured to receive a semiconductor wafer therein. The protuberance is located within the annulus proximate the inner surface and is configured to cooperate with a concavity in a periphery of the semiconductor wafer. This cooperation prevents the semiconductor wafer from rotating with respect to the wafer carrier head during polishing of the semiconductor wafer.
Thus, in a broad sense, the present invention provides a way to hold a semiconductor wafer securely in a carrier head so that the wafer does not inadvertently rotate within the carrier head during polishing. This eliminates unwanted variation from wafer to wafer in the results of chemical/mechanical planarization.
In another embodiment, the protuberance may include a pin having a longitudinal axis normal to the wafer backing surface with the pin contacting the inner surface. The pin, in another aspect however, may be movably coupled to the wafer carrier head.
In an embodiment to be illustrated and described, the protuberance is integrally formed with a wafer backing film. The wafer backing film is interposed between the semiconductor wafer and the wafer backing surface during polishing. In yet another aspect, the protuberance is a boss coupled to the inner surface. In one form, the protuberance may comprise an inert material such as: stainless steel, titanium, or platinum. In a further aspect, the protuberance may also comprise a resilient coating, or the protuberance itself comprise a resilient material. In a further aspect of these embodiments, the resilient material may be: polyvinylacetate, polytetrafluoroethylene, or Delrin®. In a particularly advantageous embodiment, the resilient material forms a slurry seal against the semiconductor wafer and the carrier ring.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.


REFERENCES:
patent: 3263375 (1966-08-01), Zimmerman
patent: 4780991 (1988-11-01), Gosis
patent: 5664988 (1997-09-01), Stroupe et al.
patent: 6062953 (2000-05-01), Takaya et al.
patent: 360259372 (1985-12-01), None

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