Wafer back side coating to balance stress from passivation...

Details Wafer back side coating to balance stress from passivation... Wafer back side coating to balance stress from passivation...

2007-01-30

2007-01-30

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

C438S463000, C438S464000

Reexamination Certificate

active

10082372

ABSTRACT:
A method for balancing layer-caused compressive or tensile stress in a semiconductor die, die wafer or similar substrate uses a stress-balancing layer (SBL) attached to the opposite side from the stress-causing layer before the die or wafer is significantly warped are provided. The SBL may also serve as, or support, an adhesive layer for die attach, and be of a markable material for an enhance marking method.

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