Wafer alignment mark for image processing including...

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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C438S401000, C438S462000

Reexamination Certificate

active

06841890

ABSTRACT:
An alignment mark is arranged to be within an image screen and the alignment mark is formed with rectangular patterns having varied dimensions from each other. The signal waveforms from each of the rectangular patterns are measured. The number of the rectangular patterns with normal waveforms is compared to the minimum required number of marks prescribed beforehand. The amount of deviation in alignment is calculated by excluding the abnormal measured result.

REFERENCES:
patent: 6677088 (2004-01-01), Magome et al.
patent: 57-026434 (1982-02-01), None
patent: 62-205623 (1987-09-01), None
patent: 9-74063 (1997-03-01), None
patent: 10-319574 (1998-12-01), None

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