Voltage variable capacitor with improved C-V linearity

Details Voltage variable capacitor with improved C-V linearity Voltage variable capacitor with improved C-V linearity

2002-06-28

2003-12-02

Patel, Rajnikant B. (Department: 2838)

Electricity: power supply or regulation systems

Input level responsive

Using a linearly acting final control device

C455S550100, C377S095000

Reexamination Certificate

active

06657421

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to voltage variable capacitors and, more particularly, to voltage variable capacitors with improved C-V linearity.
BACKGROUND OF THE INVENTION
Voltage variable capacitors (hereinafter referred to as “VVC's”) offer major performance advantages over PIN diodes in impedance matching applications wherein a drain current can be three orders of magnitude less for a VVC than for a PIN diode. Further, VVC's offer the possibility of continuous impedance tuning with a substantially reduced component count.
As is known in the art, VVC's are typically formed using standard semiconductor processes and techniques. In general, a semiconductive layer is formed on a semiconductor substrate by forming a doped layer on the surface of the substrate. An insulating layer is then formed on the surface of the doped layer and a pair of radio frequency (hereinafter referred to as “RF”) capacitors are formed by depositing two spaced apart metal contacts on the surface of the insulating layer. Each contact forms a capacitor in conjunction with the underlying semiconductive layer. The two spaced apart metal contacts are Input/Output contacts for the VVC and opposite contacts for each of the capacitors are connected together and to the back side of the substrate by the semiconductive layer.
The VVC is connected into a circuit by connecting a first variable direct current (hereinafter referred to as “DC”) voltage between the back side of the substrate and one of the two spaced apart metal contacts and a second variable DC voltage between the back side of the substrate and the other of the two spaced apart metal contacts. Generally, the two variable voltages are the same and are supplied by one voltage supply. The WC has a typical S-shaped capacitorvoltage (hereinafter referred to as “C-V”) waveform. The problem is that the C-V waveform has breaks or very sharp corners (i.e. C
min
and C
max
) in it which produce irregularities in the inter-modulation (hereinafter referred to as “IM”) performance. Also the linear portion of the curve (between C
min
and C
max
) is relatively short which reduces the linearity of the VVC.
Accordingly it is highly desirable to provide an electronic circuit apparatus which overcomes or reduces these problems.
SUMMARY OF THE INVENTION
To achieve the objects and advantages specified above and others, an electronic control circuit for a voltage variable capacitor is disclosed. The electronic control circuit includes a plurality of voltage variable capacitors, a plurality of resistors, a plurality of variable electrical power sources wherein the plurality of voltage variable capacitors, the plurality of resistors, and the plurality of variable electrical power sources are electrically interconnected to form a bias circuit. The bias circuit allows the plurality of voltage variable capacitors to have a substantially linear capacitance-voltage waveform.


REFERENCES:
patent: 3013201 (1961-01-01), Goldie
patent: 3123723 (1964-03-01), Wieder
patent: 3693110 (1972-09-01), Briggs, Jr. et al.
patent: 3924209 (1975-12-01), Valdettaro
patent: 4833419 (1989-05-01), Chrystie
patent: 6339711 (2002-01-01), Otaka et al.

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