Voltage tolerant output buffer

Details Voltage tolerant output buffer Voltage tolerant output buffer

1998-01-12

1999-07-20

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

327112, 326 81, 326 83, H03L 500, H03B 100

Patent

active

059260564

ABSTRACT:
An integrated circuit output buffer has an improved tolerance to voltage levels that are greater than the power supply voltage level at which the IC is designed to operate. A first transmission gate transistor (110), typically p-channel, is connected between an output conductor (101) and a resistor (108) at a given node (114). The node is also connected to the gate of a second transmission gate transistor (105), typically also p-channel. The resistor pulls the given node towards a power supply voltage level (e.g., ground), so that the second transmission gate transistor conducts in normal operation. To prevent the node from reaching ground, at least one diode-like voltage-dropping device (201, 202) is connected in series with the resistor.

REFERENCES:
patent: 4704547 (1987-11-01), Kirsch
patent: 5381062 (1995-01-01), Morris
patent: 5418476 (1995-05-01), Strauss
patent: 5512844 (1996-04-01), Nakakura et al.
patent: 5534795 (1996-07-01), Wert et al.
patent: 5635861 (1997-06-01), Chan et al.
patent: 5729157 (1998-03-01), Monk et al.
patent: 5731714 (1998-03-01), Monk et al.
patent: 5864243 (1999-01-01), Chen et al.

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