Voltage switching circuit for a semiconductor memory device

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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327 54, 327333, 327215, G05F 110

Patent

active

057867232

ABSTRACT:
The present invention comprises a cascode circuit of the type having a first and second FET in a first leg and a third and fourth FET in a second leg comprising. The first and third FETs are switched between an on state and an off state substantially in tandem in response to a level change in an input signal to the cascode circuit. The second and fourth FETs are switched between an on state and an off state substantially in tandem in response to a level change in the input signal and substantially complimentary to the switching of said first and third FETS. A biasing signal is applied to a control electrode of the first FET responsive to transition of the input signal from a first level to a second level. A biasing signal is also applied to a control electrode of the third FET responsive to transition of the input signal from the second level to the first level.

REFERENCES:
patent: 5021686 (1991-06-01), Kawata et al.
patent: 5559996 (1996-09-01), Fujioka
patent: 5594695 (1997-01-01), Yim et al.

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