Voltage sustainer for above V.sub.CC level signals

Electricity: power supply or regulation systems – Self-regulating – Using a three or more terminal semiconductive device as the...

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323349, 307297, 307304, G05F 320

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active

047361530

ABSTRACT:
This present invention provides a voltage sustainer which eliminates the DC current problems of conventional voltage sustainers. The embodiment of the voltage sustainer of the present invention comprises a first field effect transistor (FET) having its drain connected to a supply voltage and its drain connected to a second FET; a second FET having its drain connected to the source of the first FET, its source connected to an output node and its gate connected to the source of a third FET; a third FET having its source connected to the gate of the second FET and its drain connected to the output node; a first MOS capacitor having one side connected to receive an input signal and its other side connected to the interconnection between the source of the first FET and the drain of the second FET; and a second capacitor having one side connected to receive the input signal and its other side connected to the source of the third FET.

REFERENCES:
patent: 4032838 (1977-06-01), Minami et al.
patent: 4307333 (1981-12-01), Hargrove
patent: 4375595 (1983-03-01), Ulmer et al.
patent: 4628214 (1986-12-01), Leuschner
patent: 4649289 (1987-03-01), Nakano
patent: 4649291 (1987-03-01), Konishi

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