Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2001-12-07
2003-12-23
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S156000, C327S534000
Reexamination Certificate
active
06667651
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a voltage supply circuit, more particularly relates to a voltage supply circuit capable of realizing low power consumption by supplying to a semiconductor integrated circuit a minimum operating power source voltage required for maintaining normal operation and a control method of the voltage.
BACKGROUND ART
The power consumption of a semiconductor integrated circuit depends on the supplied operating power source voltage. On the other hand, when the operating power source voltage falls, the operating speed of the semiconductor integrated circuit falls. Accordingly, it is necessary to supply to the semiconductor integrated circuit a minimum operating power source voltage by which the operating speed of the semiconductor integrated circuit satisfies a predetermined reference value.
Generally, as a means to realize lower power consumption of an LSI (large-scale semiconductor integrated circuit), the delay time of a critical path in the LSI is constantly monitored and the voltage supplied to the LSI is controlled so that the delay time of the critical path becomes shorter than a certain reference value. Due to this control, a minimum voltage enabling the LSI to maintain normal operation is supplied and a lower power consumption can be realized while maintaining normal operation of the LSI.
A voltage supply circuit for supplying such a power source voltage normally comprises a replica circuit for monitoring a delay time of a critical path of the semiconductor circuit, a delay detection circuit for detecting the delay time of the replica circuit, a voltage generation circuit, and a control circuit for controlling a generated voltage of the same. The voltage generated by the voltage generation circuit is supplied as an operating power source voltage to the semiconductor integrated circuit and the replica circuit, respectively. Normally, the replica circuit is designed to have about the same delay time as that of a critical path in the semiconductor integrated circuit. Also, it is designed to have a slightly longer delay time than that of the critical path considering an operating margin of the LSI in some cases.
As explained above, the operating speed of a semiconductor integrated circuit changes in accordance with the power source voltage supplied. For example, the operating speed is high when the supplied power source voltage is high and conversely, the operating speed becomes low when the supplied power source voltage is low. The replica circuit is supplied with the same operating power source voltage as that of the semiconductor integrated circuit and has almost the same delay time as that of the critical path of the semiconductor integrated circuit, so the higher the supplied power source voltage, the shorter the delay time, and conversely the lower the supplied power source voltage, the longer the delay time. Therefore, whether or not the operating speed of the semiconductor integrated circuit satisfies a predetermined reference value can be judged by detecting the delay time of the replica circuit.
The operating voltage supplied can be controlled by inputting a predetermined signal to the replica circuit and detecting a time delay of an output signal corresponding thereto. Here, as the input signal, for example a one shot pulse or a cyclic clock signal is input to the replica circuit. The delay time of the replica circuit can be detected in accordance with a time difference or a phase difference of an output signal of the replica circuit and the above input signal. Then, the detected delay time is compared with the predetermined reference value and the generated voltage of the voltage generation circuit is controlled in accordance with the result of the comparison. For example, when the delay time of the replica circuit is larger than the predetermined reference value, control is performed for raising an output voltage of the voltage generation circuit, while conversely, when the delay time of the replica circuit is smaller than or equal to the predetermined reference value, control is performed for lowering the output voltage of the voltage generation circuit.
As a result of the above control, the semiconductor integrated circuit is supplied with a minimum voltage for enabling normal operation and a lower power source consumption is attained.
In the above conventional voltage supply circuit explained above, however, when the delay time of the replica circuit detected by the delay detection circuit is larger than the predetermined reference value and the supplied voltage has to be raised, operating errors of the semiconductor integrated circuit may occur if the output from the voltage generation circuit, that is, the operating power source voltage, is not promptly raised. The delay time of the semiconductor integrated circuit and the replica circuit may become larger than the reference value when the circuit starts to operate or the load of the voltage generation circuit is abruptly increased. In this case, it is preferable that the supplied voltage of the voltage generation circuit be controlled to reach a desired voltage level in a short time to maintain the normal operation of the semiconductor integrated circuit.
In a conventional voltage supply circuit, however, there is a limit on the extent of control of the supplied voltage by the control circuit, so when it is necessary to quickly raise the supplied voltage, an operating delay arises and the operation of the semiconductor integrated circuit may become unstable for a certain time.
This will be explained in further detail with reference to
FIG. 12
below.
For example, the control circuit detects that the delay time is larger than the reference value at a time A and requests the voltage generation circuit to raise the output voltage by a certain amount of increase. However, if the delay time is still larger than the predetermined reference value despite the amount of increase, the control circuit again requests the voltage generation circuit to raise the output voltage at a time B. By repeating the same, finally, the level of the supplied voltage is controlled to be high so that the delay time does not exceed the predetermined reference value, but there is a possibility that the semiconductor integrated circuit will not be able to normally operate during this time.
By controlling the amount of increase of the output voltage of the voltage generation circuit to be large, it is possible to deal with abrupt changes of the load etc. and possible to alleviate the above problem to some extent. However, when it is detected that the delay time of the semiconductor integrated circuit is lower than the predetermined reference value and the control circuit requests the voltage generation circuit to lower the output voltage, if the amount of reduction of the voltage is set to be large in the same way as the amount of increase, the operating voltage supplied abruptly falls and the semiconductor integrated circuit may become unable to normally operate. In this case, the control circuit may fall into an unstable condition of repeatedly requesting the voltage generation circuit to raise and reduce the amount of output voltage.
Also, in the above conventional voltage supply circuit, to make the characteristics of the replica circuit completely equivalent to those of the critical path inside the actual LSI, it is necessary that not only the number of gates of the critical path but also the interconnection capacitance and resistance of the critical path all be accurately imitated. This is difficult in practice. Therefore, the delay time detected by the replica circuit does not always accord with the delay time of the critical path of the actual LSI.
Here, as an example, the power source voltage-delay characteristic of the critical path under certain operating conditions
1
is indicated by the line A in
FIG. 13
, while the power source voltage-delay characteristic of the replica circuit for monitoring the delay time of the critical path is indicated by the line C. In a cycle T under the op
Cunningham Terry D.
Kananen Ronald P.
Rader & Fishman & Grauer, PLLC
Sony Corporation
Tra Quan
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