Electric power conversion systems – Current conversion – With voltage multiplication means
Reexamination Certificate
2002-01-16
2002-12-24
Nguyen, Matthew (Department: 2838)
Electric power conversion systems
Current conversion
With voltage multiplication means
C327S536000
Reexamination Certificate
active
06498737
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a circuit and a method for regulating voltage with low sensitivity to body effect in semiconductors.
More particularly this invention relates to the use of intrinsic transistors to fine-tune the regulation voltage.
2. Description of Related Art
Many applications implemented on today's semiconductor chips require accurate voltages. A classic example is writeable memory which requires that the amplitude of the erase voltage to exactly balance the write voltage of the writeable memory cells. If the erase voltage does not accurately match the write voltage, the memory cell will continue to store a ‘1’ value instead of the intended ‘0’ value. To insure that the write voltage and erase voltage are generated properly, an on-chip voltage regulation circuit is required. There are several on-chip and environmental effects which counteract the regulation of on-chip voltages. These include temperature effects, process variations and noise interference. Temperature effects the resistance, capacitance and current flow on chip. In addition, process variations affect the line spacings and oxide, metal and semiconductor thicknesses affect the on-chip voltages. There is one semiconductor chip design item which affects the threshold voltages and other voltages on chip. The body effect is a threshold voltage shift that occurs when there is a back bias Between the source and the body or the bulk of a transistor. In this case, the source of the field effect transistor is not coupled to ground, but the bulk is connected to ground. The above case represents the back-bias effect. This back-bias effect adds to the threshold voltage shift caused by the temperature and process variation. The problem of back-bias body effect is solved in this invention.
U.S. Pat. No. 5,955,874 (Zhou et al) “Supply Voltage-independent Reference Voltage Circuit” describes a voltage reference circuit comprising intrinsic MOS transistors. The circuit is independent of voltage supply and insensitive to process and temperature variations.
U.S. Pat. No. 5,783,934 (Tran) “CMOS Voltage Regulator with Diode-Connected Transistor Divider Circuit” describes a CMOS voltage regulator. This voltage regulator is configured in a negative feedback operational amplifier loop with diode connected p-MOS FETs serving as a resistor divider.
U.S. Pat. No. 5,097,303 (Taguchi) “On-Chip Voltage Regulator and Semiconductor Memory Device Using the Same” discloses a voltage regulator comprising diode-connected MOS transistors. The internal chip voltage created is little affected by variations in the load current and consumes a small amount of current in stand by mode.
U.S. Pat. No. 5,029,282 (Ito) “Voltage Regulator Circuit” discloses a regulator made up of diode connected MOS FETs. This regulator circuit is ideal for an integrated circuit with a charge pump circuit having a voltage output terminal.
BRIEF SUMMARY OF THE INVENTION
It is the objective of this invention to provide a circuit and a method for for regulating the voltage for semiconductor integrated circuits.
It is further an object of this invention to accurately regulate voltage on chips by eliminating the sensitivity due to temperature, process and noise by eliminating the problems introduced by body effect.
The objects of this invention are achieved by a circuit that provides voltage regulation using a charge pump, a PN diode, diode connected NMOS field effect transistors, an intrinsic NMOS field effect transistor, a current mirror discharge NMOS field effect transistor, a current source and, a diode connected NMOS field effect transistor current mirror.
The problem of back-bias body effect is solved in this invention by using one or more intrinsic MOS field effect transistors. Intrinsic MOS FETs have low threshold voltage, Vt. In fact, more than one intrinsic transistor can be applied into the diode chain in order to generate the proper regulation voltage level. Therefore, this voltage regulator output stage generates a regulated voltage equal to the sum of the breakdown voltage Vbd of said PN diode, the threshold voltages, Vtn, of said N diode connected NMOS field effect transistors including the intrinsic MOS transistors which are also diode-connected, and the drain-to-source voltage, Vds of said current mirror discharge NMOS field effect transistor.
Vpp=Vbd+Vt
1
+
Vt
2
+ . . . +
Vtn+Vds
In summary, if we use intrinsic MOS with low sensitivity to body effect as the components of the voltage regulator, the regulation voltage will also have low sensitivity to body effect. This reduces the back bias effect to the regulator. Also, this circuit of this invention uses the grounding of the sources of the current mirror MOS transistors. This also reduces the back-bias effect.
REFERENCES:
patent: 5029282 (1991-07-01), Ito
patent: 5097303 (1992-03-01), Taguchi
patent: 5767736 (1998-06-01), Lakshmikumar et al.
patent: 5783934 (1998-07-01), Tran
patent: 5955874 (1999-09-01), Zhou et al.
patent: 6255872 (2001-07-01), Harada et al.
Ackerman Stephen B.
Nguyen Matthew
Taiwan Semiconductor Manufacturing Company
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