Voltage regulator with improved load regulation using...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C323S277000, C323S280000

Reexamination Certificate

active

06933772

ABSTRACT:
A low drop out voltage regulator (10) that receives an input voltage and generates a substantially constant output voltage includes a gain stage (12), a buffer stage (14), an output driver transistor (16), and first and second load current sense circuits (18, 20). The first load current sense circuit is connected between the output driver transistor and the buffer stage and adaptively increases a bias current of the buffer stage as a function of the load current. The second load current sense circuit is connected between the output driver transistor and the gain stage and adaptively decreases a bias current of the gain stage as the load current increases.

REFERENCES:
patent: 6246221 (2001-06-01), Xi
patent: 6509722 (2003-01-01), Lopata
patent: 6522111 (2003-02-01), Zadeh et al.
patent: 6523099 (2003-02-01), Namekawa
Chava et al., “A Robust Frequency Compensation Scheme for LDO Regulators,”IEEE, 2002, pp. V-825-V828.
Rincon-Mora et al., “A Low-Voltage, Low Quiescent Current, Low Drop-Out Regulator,”IEEE Journal of Solid-State Circuits, vol. 33, No. 1, Jan. 1998, pp. 36-44.
Rincon-Mora et al., “Optimized Frequency-Shaping Circuit Topologies for LDO's,”IEEE Transactions on Circuits and Systems—II: Analog and Digital Signal Processing, vol. 45, No. 6, Jun. 1998, pp. 703-708.
Simpson, “A User's Guide to Compensating Low-Dropout Regulators,”IEEE, 1997, pp. 270-275.
Stanescu, “A 150mA LDO in 0.8 μm CMOS Process,”IEEE, 2000, pp. 83-86.
Yuan et al., “Low Dropout Voltage Regulator for Wireless Applications,”IEEE, 2002, pp. 421-424.

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