Voltage regulator with electrostatic discharge shunt

Details Voltage regulator with electrostatic discharge shunt Voltage regulator with electrostatic discharge shunt

2001-03-27

2004-01-13

Toatley, Jr., Gregory J. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Voltage regulator protective circuits

C361S056000, C361S088000, C361S091100, C361S091500, C361S111000, C361S117000, C361S118000

Reexamination Certificate

active

06678130

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to the field of electronic circuits and, more particularly, to the field of voltage regulation and ESD protection on semiconductor chips.
In integrated circuit design, there are two functions that are often required by a chip. One function is voltage regulation of a power supply. Fluctuations in the power supply to a chip can adversely affect the performance of an integrated circuit. To prevent this, the power supply is regulated with a voltage regulator. The purpose of a voltage regulator is to maintain a steady, stable voltage for the chip to use as its power supply. A very large transistor is used in such a voltage regulator to supply the large amount of current required by a chip.
A second function almost always found on a chip is electrostatic discharge (ESD) protection. ESD events are a hazard from which a chip must be protected, since they are an unfortunately common occurrence. For example, a person can generate thousands of volts in static electricity by simply walking across a carpet. If that same person were to touch an unprotected chip immediately afterwards, the high-voltage static electricity discharged between the person and the chip could permanently damage the chip and render it inoperable. An ESD shunt built into the chip can prevent such damage from happening. In order to cope with the high current generated during an ESD event, an ESD shunt has very large transistors built into its circuit that divert the current safely to ground.
An important goal in integrated circuit design is to minimize the area that a circuit takes up on a chip. The amount of area available on a chip is at a premium, and very expensive. However, since both the voltage regulator and the ESD shunt include very large transistors in their circuits, it was difficult in the past to fit both circuits on one chip. Although there have been a few instances where chips have been known to include both a voltage regulator and an ESD shunt, those instances are very rare, and occur only because either the voltage regulator is very small and supplies just a sub-circuit of the chip, or because there was enough extra area available on the chip. Both scenarios are highly unusual and unlikely. Additionally, the voltage regulator and ESD shunt were never before combined into one circuit. If these two circuits appeared together on a chip at all, they appeared as two separate circuits. The majority of chip designs typically include the ESD shunt on-chip, while the voltage regulator is an off-chip component found on a PC board, or in the power supply itself.
This arrangement is problematic for several reasons. First, placing the voltage regulator off-chip may introduce noise into the power supply. Furthermore, the cost of building the voltage regulator as a separate component, with separate packaging and a separate manufacturing process, can be expensive. And finally, some chip designs operate at two different voltages. With the voltage regulator off-chip, two valuable input/output (I/O) pins on the chip are needed to provide two separate voltage supplies to the chip. If it were possible to include the voltage regulator on-chip instead, the voltage regulator could use one voltage to generate a second voltage.
SUMMARY OF THE INVENTION
In accordance with an illustrated preferred embodiment of the present invention, the voltage regulator and the ESD shunt are both incorporated into one combined circuit. The present invention achieves this by sharing the functionality of one of the very large transistors between the voltage regulator and the ESD shunt. In this way, the area required by this combined circuit is greatly reduced. In fact, the area required by the combined circuit is not much larger than the area of just the ESD shunt alone.
Because of this significant reduction in area, the voltage regulator and the ESD shunt can now be manufactured together on a single chip with ease. The advantages of this arrangement are many. It allows the voltage regulator to be much closer to the power supply of the chip, which reduces the possibility of noise on the power line. Additionally, there is no longer a need to use a separate component for the voltage regulator, saving on manufacturing costs. Finally, this arrangement allows chip designs that operate at two separate voltages to use a first voltage to generate a second one, saving a valuable I/O pin in the process.
Further features and advantages of the present invention, as well as the structure and operation of preferred embodiments of the present invention, are described in detail below with reference to the accompanying exemplary drawings.


REFERENCES:
patent: 5212616 (1993-05-01), Dhong et al.
patent: 5337205 (1994-08-01), Haun et al.
patent: 5465188 (1995-11-01), Pryor et al.
patent: 6201674 (2001-03-01), Warita et al.

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