Electricity: power supply or regulation systems – In shunt with source or load – Using choke and switch across source
Reexamination Certificate
2001-09-06
2003-01-14
Sherry, Michael (Department: 2838)
Electricity: power supply or regulation systems
In shunt with source or load
Using choke and switch across source
C323S224000, C323S225000
Reexamination Certificate
active
06507174
ABSTRACT:
1. Technical Field of the Invention
The present invention relates to the field of switching power supplies, and in particular, to a switching voltage regulator module.
2. Description of the Related Art
Advances in integrated circuit (IC) technology often relate to the ever-decreasing operating voltages required to operate such circuits. A lower operating voltage may translate into lower costs due to decreases in circuit size and power consumption. Present demands for faster and more efficient data processing have prompted a significant development effort in the area of low-voltage integrated circuits. Currently, low-voltage integrated circuits operating in the three-volt range (e.g., 3.3 V ICs) are highly desirable. The three-volt ICs are gradually replacing the standard five-volt ICs due to their higher speed and higher integration densities.
Moreover, the three-volt ICs consume less power than the traditional five-volt ICs. Thus, in battery operated devices, such as portable telephones and lap-top computers, low-voltage integrated circuits allow the devices to operate proportionally longer than devices requiring higher voltage for operation.
However, the 3.3 V ICs represent only a transition to ICs with even lower operating voltages that will not only further improve speed and reduce power consumption, but will also allow direct, single-cell battery consumption. It is expected that the next generation of data processing ICs will be operable at voltages in the 1-2 V range. At the same time, since more devices are integrated on a single processor chip and the processors operate at higher frequencies, microprocessors require aggressive power management. Compared with current processors which require a current draw of around 13 amps, future generation processors will require a current draw in the range of 50-100 amps. The load range may reach 1:100.
Further, as the speed of the ICs increase, they are becoming more dynamic loads to their power supplies. Next generation microprocessors are expected to exhibit current slew rates of 50A/microsecond. Moreover, the output voltage regulation becomes much tighter (e.g., from 5% to 2%). Voltage regulator modules (VRMs) which feed the microprocessors have to have high efficiency, fast transient response and high power density. These requirements pose serious design challenges.
FIG. 1
is a schematic block diagram of a prior art synchronized buck converter
100
. The circuit
100
is typically used as a VRM to meet the requirements of high efficiency, fast transient response and high power density. In operation, switches S
1
and S
2
turn on and off in complementary fashion. The voltage gain of the buck converter circuit
100
can be described by:
D=V
o
/V
in
(1)
where D is the duty ratio of switch S
1
.
As is well known in the art, the buck converter has a high efficiency and good transient response at around a duty cycle of 0.5. For a 5V input voltage and a 2V output, the duty cycle is 0.4, which is an acceptable duty cycle ratio for achieving high efficiency.
Since future VRMs will be required to provide more power to the microprocessors, the power switch must be able to deal with higher currents, which decreases efficiency. However, in accordance with the power equation, the increased power required by future microprocessors may be achieved by raising the input voltage instead, which allows the input current to be decreased, thereby reducing conduction losses. In addition, this also reduces the size of the capacitance. As such, it is preferable that VRMs have a 12V or higher input voltage. For example, the input voltage can be as high as 19V for notebook computers. According to equation (1), the duty cycle for a conventional synchronized buck converter is as small as 0.1 with a 12V input and a 12V output. A drawback of a duty cycle on the order of 0.1is that the circuit exhibits poor performance in terms of efficiency, voltage regulation and transient response.
FIG. 2
is a circuit diagram of a tapped converter circuit
200
according to the prior art. The converter circuit
200
includes a first power switch S
1
connected across an unregulated DC input source, V
in
. One side of power switch S
1
is connected to a first winding N
1
of a tightly coupled winding pair (N
1
, N
2
). The coupled winding pair.(N
1
, N
2
) is connected at junction
12
to filter capacitor C
o
and load R
L
. Filter capacitor C
o
and load R
L
are connected in parallel. Converter circuit
200
further includes a second power switch S
2
connected in series with a second winding N
2
of the winding pair (N
1
, N
2
). The serially connected power switch S
2
and second winding N
2
are connected in parallel with the filter capacitor C
o
and load R
L.
The operation of the converter circuit
200
will be described with reference to
FIGS. 3
a
-
3
g
which illustrates the corresponding switching waveforms associated with the converter circuit
200
.
At a time prior to time t
1
, switch S
1
is OFF. From a time t
1
to a time t
2
, switch S
1
is turned ON (see
FIG. 31
a
) and switch S
2
is turned off (see
FIG. 3
b
). The voltage difference between the input voltage V
in
and the output voltage V
o
, i.e., (V
in
,−V
o
) is applied to winding N
1
of the coupled inductor windings N
1
and N
2
. The input current i
s1
, which is the winding current in N
1
, increases linearly as shown in
FIG. 3
c
. Therefore, during the time t
1
to t
2
, the input voltage delivers power to the output through the conduction of switch S
1
and winding N
1
. During this time, energy is stored in winding N
1
.
At a time equal to t
2
, switch S
1
is turned OFF and switch S
2
is turned ON. The energy stored in winding N
1
from time t
1
to t
2
is transferred to winding N
2
. The winding current i
N2
flows through switch S
2
to release its energy to the output. The process operates as a flyback converter. Based on the voltage-second balance in winding N
1
, the voltage gain of the converter circuit
200
can be written as:
V
o
/V
in
=1/[1+(N
1
/N
2
)*(1/D−1)] (2)
where D is the duty ratio of switch S
1
. From equation (2) it can be seen that a duty cycle on the order of 0.5can be realized to achieve a high circuit efficiency by properly choosing the turns ratio of the coupled inductors. As one example, for an input voltage, V
in
=12V, an output voltage, V
o
=1.5V, and a desired duty cycle, D=0.5, the ratio N
1
/N
2
=7.
One disadvantage of circuit
200
is that a high voltage spike occurs across switch S
1
when S
1
turns off (e.g., at time t
2
, see
FIG. 3
f
) because the leakage energy of winding N
1
cannot be transferred to winding N
2
due to an imperfect coupling between windings N
1
and N
2
. The leakage energy stored in leakage inductor L
k
(not shown) which cannot be transferred to winding N
2
charges the output parasitic capacitance (not shown) of switch S
1
through conducting switch S
2
which causes a high voltage stress across S
1
. As a result, a high voltage rated MOSFET switch must be used in the circuit
200
which significantly increases the power loss and reduces the efficiency.
It would be desirable to provide a circuit configuration which avoids the necessity of using a high voltage rated MOSFET switch and which recycles the leakage energy of the coupled leakage inductor to further improve circuit efficiency.
SUMMARY OF THE INVENTION
It is, therefore, a primary object of the present invention to provide a circuit so that a low-voltage rated power switch can be used to improve circuit efficiency.
It is another object of the present invention to provide a circuit which recycles the leakage energy of a coupled leakage inductor to further improve circuit efficiency.
It is yet another object of the present invention to provide a circuit which uses as few components as necessary.
According to a first embodiment of the present invention, there is provided an active clamp step-down converter circuit with a power switch voltage clamping function including a first s
LandOfFree
Voltage regulator with clamping circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Voltage regulator with clamping circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Voltage regulator with clamping circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3047653