Voltage regulator for low-consumption circuits

Details Voltage regulator for low-consumption circuits Voltage regulator for low-consumption circuits

2001-11-07

2003-05-06

Berhane, Adolf Deneke (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

Reexamination Certificate

active

06559627

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to voltage regulators and, more particularly, to a voltage regulator for use in a low-consumption circuit system.
2. Description of the Related Art
In a circuit system constituted by various devices which perform different functions in a coordinated manner, it is known, in order to reduce energy consumption, to supply energy only to the devices which are necessary to the system at the time in question in preselected operating conditions, whilst the devices which are not necessary are kept in a waiting or standby state in which energy consumption is very low. In many cases, it is important for the transition from the standby state to the active state to be quick and free of transients.
A circuit system of this type is that which controls the operation of a non-volatile memory. To illustrate the invention, reference will be made below to such an application and, in particular, to a multilevel non-volatile memory.
In a multilevel memory, each cell can adopt several threshold-voltage levels so that it is possible to store several bits in each individual cell. A cell which can store n bits will therefore be characterized by 2
n
possible threshold-voltage distributions.
Clearly, as the number of threshold-voltage levels increases, the precision requirements in order for the operations of the cell, in particular, the programming and reading operations, to be performed correctly, also increase. As is known, programming takes place by applying a voltage which is variable in steps to the row (or word line) containing the cell to be programmed, that is, to the gate terminals of all of the cells of a row, and by applying a relatively high voltage to the column line, that is, to the drain terminal of the cell. According to a conventional procedure, reading takes place by applying a fixed voltage to the row line of the cell to be read and measuring the current which flows through the column line of the cell. The value of the current measured indicates the logic state of the cell.
It is difficult to achieve the necessary precision in multilevel memories with a low supply voltage (3V or less). In these cases, the high voltages which are necessary for the reading, programming and erasure operations are generated by voltage-boosters based on the charge-pump principle. As is known, a charge pump is a generator with characteristics quite different from those of an ideal voltage generator; in fact, it has a fairly high output resistance so that the output voltage is greatly dependent on the load. Moreover, after overloading, it requires quite a long time to return to the nominal output voltage. Moreover, since the nominal output voltage cannot be set precisely, it is necessary to associate with the charge pump a regulation circuit that contributes to energy consumption.
To reduce consumption, the voltage-boosters are normally deactivated when the device to which they belong is in the standby state. In ideal conditions, the voltages present at the output nodes of the voltage-boosters would remain constant indefinitely but, in practice, they decrease within fairly short periods of time, due to current leakage at the junctions of the transistors connected to the output nodes. When a transition takes place from the standby state to the active state, it is therefore not possible to reach the necessary biasing voltage quickly and with the desired accuracy.
FIG. 1
shows schematically a known circuit system for biasing a row line of a non-volatile memory which uses a voltage-booster. A non-volatile memory, for example, a four-level flash memory supplied at 3V, is formed by a plurality of memory cells
10
arranged in rows and columns. In particular, the cells
10
belonging to the same row have their respective gate electrodes connected to a common row line
11
. A row decoder
12
selectively connects one of the row lines
11
to the output terminal OUT of a voltage-booster
9
. A capacitor
13
connected between the output terminal OUT and the earth terminal of the circuit system represents the stray capacitance of the decoder circuits
12
and, when a row line is connected, the stray capacitance of the line.
The voltage-booster
9
comprises a charge pump
14
with an output capacitor
17
and a voltage regulator. The charge pump
14
is connected to a node
16
to which a supply terminal of the regulator is connected. The regulator comprises a comparator
18
, a reference-voltage source
20
, and a feedback circuit. The comparator
18
is preferably constituted by a differential input stage, by a power output stage, and by a frequency-compensation circuit (not shown). The output of the comparator
18
is also the output OUT of the regulator and is connected, by means of a switch SW
1
, to a standby-voltage generator
19
. The node
16
is also connected to the standby-voltage generator
19
by means of a switch SW
2
.
The comparator
18
has a first, non-inverting input terminal (+) connected to the reference-voltage source
20
and a second, inverting input terminal (−) which is connected to the output terminal OUT by means of the feedback circuit. The feedback circuit comprises a resistive divider
21
which is connected, on one side, to the output OUT by means of a switch SW
3
and, on the other side, to a common reference terminal of the circuit, in this example, to the earth, and which has an intermediate tap connected to the inverting input of the comparator
18
at a node F and to earth by means of a switch SW
4
.
The reference-voltage source
20
, which is preferably a “bandgap” circuit, is never deactivated unless the supply is removed from the device as a whole, because its turn-on and reference-voltage regulation time is quite long (10&mgr;s). However, it can be formed so as to dissipate a fairly low current (10&mgr;A).
A control circuit
22
, which preferably forms part of the logic control unit of the memory, generates a standby signal SB which activates or deactivates the charge pump
14
and opens or closes the switches SW
1
-SW
4
. In
FIG. 1
, the switches are shown in the positions corresponding to a high-level signal SB, that is, when the circuit is in standby condition.
The divider
21
comprises a fixed resistive element R
0
and a resistive element R
1
which is variable in dependence on the state of an n-bit digital signal S
0
-Sn−1. Variation of the division ratio of the divider
21
causes the feedback coefficient of the regulator also to vary. It can easily be shown that the voltage Vout at the output terminal OUT is
V
out=
V
ref(1
+R
1
/
R
0
),
where Vref is the voltage of the reference-voltage source
20
; the regulator thus forms a D/A (digital/analog) converter the output voltage Vout of which is the analog quantity corresponding to a combination of states of the inputs S
0
-Sn−1, that is, to a binary input number.
In controlling the standby state, it is necessary to address two problems, that is: to find a way to reduce overall consumption by deactivating some circuits without turning them off completely so that they can be turned on again quickly, and to prevent spurious transients upon leaving the standby state.
In a circuit of the type shown in
FIG. 1
, the first problem can be solved if, in a standby state, the output OUT and the voltage at the node
16
are kept at a voltage value equal to or slightly greater than the operating voltage. For this purpose, a low-consumption generator
19
with an output voltage Voutsb is connected to the output OUT and to the node
16
in the standby state (SW
1
and SW
2
closed). A generator usable in the circuit of
FIG. 1
is described, for example, in the Applicant's European patent application entitled “A voltage-raising device for non-volatile memories operating in a low-consumption standby condition”.
The second problem can be solved only by avoiding any capacitive component in the feedback circuit of the regulator, as will be understood from the following.
With reference to
FIGS. 1 and 2
, in standb

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