Voltage regulator circuit

Details Voltage regulator circuit Voltage regulator circuit

1989-12-14

1991-07-02

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072962, H03L 100, H03K 3354

Patent

active

050292820

ABSTRACT:
A voltage regulator circuit for use with an integrated circuit with a charge pump circuit having a voltage output terminal and a voltage input terminal in which a plurality of voltage regulating P-channel MOS transistors, each of which has its source and substrate connected together and its gate and drain connected together, are connected in series between the voltage output and input terminals of the charge pump circuit.

REFERENCES:
patent: 4439692 (1984-03-01), Beekmans et al.
patent: 4553047 (1985-11-01), Dillinger et al.
patent: 4631421 (1986-12-01), Inoue et al.
patent: 4961167 (1990-10-01), Kumanoya et al.
patent: 4964082 (1990-10-01), Sato et al.
Pathak et al, "A 19-ns 250-MW CMOS Erasable Programmable Logic Device", IEEE Journal of Solid-State Circuits, vol. SC-21, No. 5, Oct. 1986, pp. 775-784.
Patent Abstracts of Japan, vol. 10, No. 347 [E-457] [2403] Oct. 21, 1986.
Oto et al, "High-Voltage Regulation and Process Considerations for High-Density 5V-Only E.sup.2 PROM's", IEEE Journal of Solid-State Circuits, vol. SC-18, No. 5, Oct. 1983, pp. 532-538.
McCreary et al, "Techniques for a 5-V-Only 64K EPROM Based Upon Substrate Hot-Electron Injection", IEEE Journal of Solid-State Circuits, vol. SC-19, No. 1, Feb. 1984, pp. 135-143.

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