Voltage regulating circuit with a clamp up circuit and a...

Details Voltage regulating circuit with a clamp up circuit and a... Voltage regulating circuit with a clamp up circuit and a...

2000-05-19

2001-05-08

Patel, Rajnikant B. (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S266000, C327S538000

Reexamination Certificate

active

06229290

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a voltage regulating circuit for use in an integrated circuit for receiving an externally supplied voltage and for providing a regulated voltage supplied to the various components of the integrated circuit. More particularly, the present invention relates to a voltage regulating circuit having a voltage clamp up circuit and a voltage clamp down circuit operating in tandem.
BACKGROUND OF THE INVENTION
A constant voltage circuit with very low impedance is desired in many applications in integrated circuit design. This requirement may include a fast response time and a simple implementation. Thus, an externally supplied voltage source can be regulated to provide an internal power supply for low power, low voltage application. Heretofore, although voltage regulating circuits are well known in the art, they have not satisfied the criteria of supplying low power, with fast response time and simple implementation for use in an integrated circuit.
SUMMARY OF THE INVENTION
A voltage regulating circuit receives an unregulated voltage and an activation signal and in response thereto provides a regulated voltage. The voltage regulating circuit has a voltage clamp down circuit operating in tandem with a clamp up circuit. The voltage clamp down circuit receives the unregulated voltage and the activation signal and in response thereto generates a first output voltage at an output node in the event the unregulated voltage exceeds the first output voltage. The voltage clamp up circuit receives the unregulated voltage and an inverse of the activation signal and in response thereto generates a second output voltage at an output node in the event the unregulated voltage is below the second output voltage. The output node of the voltage clamp down circuit is connected to the output node of the clamp up circuit.


REFERENCES:
patent: 4578630 (1986-03-01), Grosch
patent: 5264782 (1993-11-01), Newton
patent: 5367247 (1994-11-01), Blocher et al.
patent: 5631599 (1997-05-01), Bacrania et al.
patent: 5818271 (1998-10-01), Stanojevic
patent: 5818708 (1998-10-01), Wong

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