Voltage random access memory (VRAM)

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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C365S154000

Reexamination Certificate

active

07079067

ABSTRACT:
An integrated circuit memory cell and voltage ladder design that adapts techniques typically applied to Static Random Access Memory (SRAM) circuits to implement a compact array of analog Voltage Random Access Memory (VRAM) locations. The memory cells in the VRAM each store a digital value that controls a corresponding switch. The switch couple a particular voltage from a set of voltages generated by the ladder, to be output when that location is enabled. Multiple analog output voltages are provided by simply providing additional rows of cells.

REFERENCES:
patent: 5744659 (1998-04-01), Tsuda et al.
patent: 6341084 (2002-01-01), Numata et al.
patent: 6587371 (2003-07-01), Hidaka
patent: 6754123 (2004-06-01), Perner et al.

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