Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1996-09-11
2000-05-23
Hjerpe, Richard A.
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
345100, G09G 320
Patent
active
060670665
ABSTRACT:
A voltage output circuit has decoders, a selecting circuit, a logical circuit and an output circuit in order to select one of plural gradation power source lines for a prescribed period based upon k bits and m bits of an n-bit digital signal. The k bits of the digital signal are converting into 2.sup.k decoded signals by one decoder, and another m bits are converted into 2.sup.m decoded signals by the other decoder. The selecting circuit generates a signal for selecting one of periods which were obtained by dividing one horizontal scanning period into 2.sup.k based upon k-numbered timing signals by using the 2.sup.k decoded signals. The logical circuit generates 2.sup.n signals composed of combinations of the signals from the selecting circuit and the 2.sup.m decoded signals. Moreover, one of the 2.sup.m gradation power source lines is selected by an output switch by using the signal from the logical circuit. As a result, in an image display device using a digital signal as an input video signal, a number of gradation power source lines is reduced and the arrangement of driving circuits is simplified without deteriorating display quality. As a result, a cost of the image display device can be lowered.
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Kubota Yasushi
Sasaki Osamu
Yoneda Hiroshi
Frenel Vanel
Hjerpe Richard A.
Sharp Kabushiki Kaisha
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