Voltage offset producing circuit for use with a line receiver or

Details Voltage offset producing circuit for use with a line receiver or Voltage offset producing circuit for use with a line receiver or

1982-12-27

1986-01-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307297, 307443, 307491, 330261, H03K 19007, H03K 19092

Patent

active

045673845

ABSTRACT:
A circuit which may be utilized with a EIA RS 422/423 line receiver to guarantee that the output of the receiver goes to a known output logic stage when there is no signal supplied at the input thereof. The circuit comprises a pair of substantially indentical transistor circuits coupled in parallel between a power supply bus. One transistor of a particular one of the transistor circuits is fabricated with a smaller emitter area with respect to its counterpart transistor in the other transistor circuit. Thus, a voltage difference is established between the emitter contacts of the two transistors which produces the voltage offset. This voltage offset is utilized to dirve the output of the line receiver to said output state absence an input signal supplied to the receiver.

REFERENCES:
patent: 3582681 (1971-06-01), Norman
patent: 3656003 (1972-04-01), Chen et al.
patent: 4166983 (1979-09-01), Lacroix
patent: 4258331 (1981-03-01), Nakayama
patent: 4308470 (1981-12-01), Regnier
patent: 4395681 (1983-07-01), Hornung et al.
patent: 4532479 (1985-07-01), Blauschild

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