Voltage multiplier for nonvolatile semiconductor memory

Details Voltage multiplier for nonvolatile semiconductor memory Voltage multiplier for nonvolatile semiconductor memory

1989-04-03

1990-11-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 3072965, 307110, 3072963, 363 60, 365226, H03K 301, H02M 318, G11C 0000, H03L 500

Patent

active

049704095

ABSTRACT:
A voltage multiplier for a use in a non-volatile semiconductor memory and operated at a low operation voltage with a reduced area comprising a plurality of cascade-connected basic circuits.

REFERENCES:
patent: 4000412 (1976-12-01), Rosenthal et al.
patent: 4405868 (1983-09-01), Lockwood
patent: 4839787 (1989-06-01), Kojima et al.
Dickson, "On-Chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved Voltage Multiplier Technique", IEEE Journal of Solid-State Circuits, vol. SC-11, No.3, Jun. 1976, pp. 374-378.
Carr et al, "MOS/LSI Design and Application" McGraw Hill, 1972 pp. 123-124.

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