Voltage multiplier circuit and nonvolatile semiconductor memory

Details Voltage multiplier circuit and nonvolatile semiconductor memory Voltage multiplier circuit and nonvolatile semiconductor memory

1996-02-07

1999-10-19

Zarabian, A.

Static information storage and retrieval

Floating gate

Particular biasing

36518517, 36518518, 36518909, G11C 1606

Patent

active

059699884

ABSTRACT:
A voltage multiplier circuit for raising an input voltage to a predetermined voltage is characterized in that a plurality of multiplier cells for raising an input voltage to be outputted, and a connection switching circuit for switching a connection state of these multiplier cells are provided, and the connection switching circuit connects multiplier cell groups formed by connecting one or a plurality of the multiplier cells, in parallel to an output, and varies the number of the multiplier cells of the multiplier cell groups and that of the multiplier cell groups.

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patent: 5072134 (1991-12-01), Min
patent: 5157280 (1992-10-01), Schreck et al.
patent: 5394372 (1995-02-01), Tanaka et al.
"On-Chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved Voltage Multiplier Technique", Dickson, J.F., IEEE Journal of Solid-State Circuits, vol. SC-11, No. 3, pp. 374-378, Jun. 1976.
Digest of Technical papers, Session 10, Tham 10.3, D'Arrigo et al., IEEE, ISSCC 89, pp. 132-133, Feb. 16, 1989.

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