Voltage multiplexed chip I/O for multi-chip modules

Details Voltage multiplexed chip I/O for multi-chip modules Voltage multiplexed chip I/O for multi-chip modules

1996-06-04

1998-09-29

Young, Brian K.

Coded data generation or conversion

Digital code to digital code converters

Tree structure

H03M 100

Patent

active

058151001

ABSTRACT:
An electrical interconnect between a plurality of output nodes of a first integrated circuit (IC) and a plurality of input nodes of a second IC, the interconnect. A first bond pad located on the first integrated circuit is coupled to the output nodes. A second bond pad located on the second integrated circuit is coupled to the input nodes. A first digital-to-analog converter located on the first integrated circuit and having an output coupled to the first bond pad receives a plurality of binary inputs from the output nodes of the first integrated circuit. A first analog-to-digital converter is located on the second integrated circuit and coupled to the second bond pad and has an output line coupled to each of the plurality of input nodes of the second IC.

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"IEEE Workshop on FPGAs for Custon Computing Machines"; Jonathan Babb et al. IEE Computer Society Press, Apr. 5-7, 1993.

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