Voltage level shifting circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307475, 307279, 307290, 307585, 307576, 307579, 307451, 365205, 365226, 365228, H03K 1710, H03K 1716, H03K 17687, H03K 3356

Patent

active

048453811

ABSTRACT:
In the present invention, a voltage level shifting circuit is disclosed. The voltage level shifting circuit comprises a first inventer and a second inverter with each inverter having a P-type MOS transistor and an N-type MOS transistor. Each of the inverters has an input port, an output port, a first voltage port and a second voltage port. The source of the P-type MOS transistor or N-type MOS transistor of each inverter is connected to the first voltage port. The voltage level shifting circuit also comprises two MOS transistors of the same conductivity type as the transistors of the inverter whose source is connected to the first voltage port. Each of the MOS transistors has a source, a drain and a gate with the drain connected to the first voltage port of each of the inverters. The sources of the first and second MOS transistors are connected together and to a high voltage level, such as V.sub.pp. Cross-coupling is provided by connecting the gate of the MOS transistor to the output port of the other inverter. The output is taken from the output port of the second inverter.

REFERENCES:
patent: 4476401 (1984-10-01), Lin
patent: 4616148 (1986-10-01), Ochii et al.
patent: 4656374 (1987-04-01), Rapp
patent: 4689504 (1987-08-01), Raghunathan et al.
patent: 4695744 (1987-09-01), Giordano
patent: 4697108 (1987-09-01), Chappell et al.

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