Voltage level shift circuit and semiconductor integrated...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Reexamination Certificate

active

07746149

ABSTRACT:
Provided is a voltage level shift circuit including: a first voltage level shift circuit formed of a P-channel enhancement type transistor (M1) and an N-channel depletion type MOS transistor (M3); and a second voltage level shift circuit formed of a P-channel enhancement type transistor (M2) and an N-channel depletion type MOS transistor (M4). In the voltage level shift circuit, a cascode circuit using an N-channel depletion type transistor (M5) is serially connected to the first voltage level shift circuit, a cascode circuit using an N-channel depletion type transistor (M6) is serially connected to the second voltage level shift circuit, and a unit for complementarily controlling bias voltages of the respective cascode circuits. As a result, an output signal of the voltage level shift circuit connected to an input of a differential amplifier circuit, for expanding an input voltage range of a signal, is not affected by fluctuations in power supply voltage.

REFERENCES:
patent: 6177824 (2001-01-01), Amanai
patent: 6617878 (2003-09-01), Brownlow et al.
patent: 7271639 (2007-09-01), Satou et al.
patent: 7358790 (2008-04-01), Kuo
patent: 2003/0174014 (2003-09-01), Nakashimo et al.
patent: H05-022054 (1993-01-01), None
Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, Maruzen Co., Ltd., Mar. 30, 2003, pp. 67-69.

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