Voltage island fencing

Electrical transmission or interconnection systems – Plural supply circuits or sources – Substitute or emergency source

Reexamination Certificate

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Details

C307S018000, C307S029000, C713S322000, C713S330000, C713S400000

Reexamination Certificate

active

06720673

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of a power supply circuits; more specifically, it relates to circuit and method for switching between normal and standby power supplies in an integrated circuit.
BACKGROUND OF THE INVENTION
In order to conserve power, semiconductor devices often are designed to allow shutdown of all but a few critical circuits that are kept powered in order continue critical functions and to speed up turn on of the device when it is re-powered or not to lose data or the last state of the device before power down. These critical circuits are place on voltage islands.
Current technologies allow voltage islands to exist within dies. Different portions of the die can be powered down while other portions, typically powered isolated logic blocks or voltage islands, need to maintain power. In some cases powering off and powering on do not impact different voltage islands. However, in critical cases, for example, a real time clock, signals on the connections from logic circuits in the portions of the die that are powered down can interfere with the function of logic circuits on a voltage island that is powered up. Voltage island logic circuits are most vulnerable during the times that the die first powers down, and the voltage island switches from normal to standby power, during the time the die is powered down and the voltage island is running on standby power and during the time the die is powered up and the voltage island is switched back to normal power. As a result creating a safe isolation method and restoration mechanism for the connections to the voltage islands is important to avoid malfunctions of the die during power down, standby and power up. Fencing is the name coupled to a method of isolation and restoration of voltage islands.
Generally, it is only the inputs to a voltage island that are of concern during the transition periods between normal and standby power and the standby period. Some inputs need to be isolated, such as test clocks, control signals, data buses and scan control signals. Some inputs need to be isolated and glitchless, such as clock-ins, inputs to self timed logic circuits and other circuits sensitive to input signal edges. Glitches occur when signals turn on or turn off. Glitches can make latches switch, so the data stored on the latch is wrong or they can make the latch become meta-stable which requires a significant amount of time to resolve.
FIG. 1
is a diagram illustrating voltage islands on a semiconductor die. In
FIG. 1
, die
100
is comprised of a plurality of input/output (I/O) pads
105
, wire I/O pads
106
and a circuit area
110
. Circuit area
110
includes a first voltage island
115
, a second voltage island
120
, a clock circuit
125
and a plurality of electrostatic discharge isolation/receiver (ESD/R) circuits
130
and ESD circuits
131
. I/O pads
105
are connected to ESD/R circuits
130
. Wire I/O pads
106
are connected to ESD circuits
131
. ESD circuits
131
are not connected to VDD. A portion of I/O pads
105
provides input signals
135
to circuits in circuit area
110
. A portion of I/O pads
105
provide output signals
140
from circuits in circuit area
110
. A portion of I/O pads
105
provide input signals
145
to circuits in voltage island
115
. A portion of I/O pads
106
provide input signals
146
to voltage island
115
. A portion of I/O pads
106
provide input signals
147
to clock circuit
125
. A portion of I/O pads
105
provide output signals
150
from circuits in voltage island
115
. Voltage island
115
has inputs
155
from and outputs
160
to circuits in circuit area
110
. Voltage island
115
also has an input
165
from clock circuit
125
and an output
170
to voltage island
120
. Voltage island
120
has inputs
175
from and outputs
180
to circuits in circuit area
110
. Inputs
145
,
155
,
165
and
175
require fencing for safe switch over from normal to standby power and back again. Inputs
146
and
147
do not require fencing as there is no connection to VDD
An important requirement for fencing is to allow enough time between the start of power down/up and the completion of power down/up operations to ensure the die enough time to become stable or to reset properly.
SUMMARY OF THE INVENTION
A first aspect of the present invention is a circuit for fencing input signals to circuits in a voltage island when switching between a normal power supply and a standby power supply, comprising: a voltage detector outputting a power sense signal in response to a fall to a first voltage value from a reference value or a rise to a second voltage value from the reference value of the voltage of the normal power supply; a standby clock generating a standby clock signal; a standby clock synchronizing circuit receiving the power sense signal and the standby clock signal, synchronizing the power sense signal to the standby clock domain and outputting a standby clock synchronized power sense signal; a counter receiving the standby clock synchronized power sense signal and the power sense signal, adding a delay to the standby clock synchronized power sense signal and outputting a delayed standby clock synchronized power sense signal; a normal clock synchronizing circuit receiving the delayed standby clock synchronized power sense signal, synchronizing the delayed standby clock synchronized power sense signal to the normal clock domain and outputting a delayed normal clock synchronized power sense signal; and fencing logic circuit receiving the delayed normal clock synchronized power sense signal and forcing the input signals high or low synchronously with the delayed normal clock synchronized power sense signal.
A second aspect of the present invention is a circuit for fencing input signals to circuits in a voltage island when switching between a normal power supply and a standby power supply, comprising: a voltage detector outputting a power sense signal in response to a fall to a first voltage value from a reference value or a rise to a second voltage value from the reference value of the voltage of the normal power supply; a standby clock generating a standby clock signal; a standby clock synchronizing circuit receiving the power sense signal and the standby clock signal, synchronizing the power sense signal to the standby clock domain and outputting a standby clock synchronized power sense signal; a counter receiving the standby clock synchronized power sense signal and the standby clock signal, adding a delay to the standby clock synchronized power sense signal and outputting a delayed standby clock synchronized power sense signal; and fencing logic circuit receiving the delayed standby clock synchronized power sense signal and forcing the input signals high or low synchronously with the delayed standby clock synchronized power sense signal.
A third aspect of the present invention is a method for fencing input signals to circuits in a voltage island when switching between a normal power supply and a standby power supply, comprising: outputting a power sense signal in response to a fall to a first voltage value from a reference value or a rise to a second voltage value from the reference value of the voltage of the normal power supply; generating a standby clock signal; synchronizing the power sense signal to the standby clock domain to create a standby clock synchronized power sense signal; adding a delay to the standby clock synchronized power sense signal to create a delayed standby clock synchronized power sense signal; synchronizing the delayed standby clock synchronized power sense signal to the normal clock domain to create a delayed normal clock synchronized power sense signal; and forcing the input signals high or low synchronously with the delayed normal clock synchronized power sense signal.
A fourth aspect of the present invention is a method for fencing input signals to circuits in a voltage island when switching between a normal power supply and a standby power supply, comprising: outputting a power sense signal in response to a

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