Electricity: battery or capacitor charging or discharging – Battery or cell discharging – With charging
Reexamination Certificate
2000-11-15
2002-07-23
Tso, Edward H. (Department: 2838)
Electricity: battery or capacitor charging or discharging
Battery or cell discharging
With charging
Reexamination Certificate
active
06424121
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a voltage generator, switching between alternating first and second voltage values, in particular for programming multilevel cells.
BACKGROUND OF THE INVENTION
As is known, a multilevel memory cell, for example of flash type, can be programmed such as to have one of N predetermined threshold voltages (or more specifically, one of N distributions of the threshold voltage), and can thus store a number M=log2 N of bits. This is obtained by injecting a controlled quantity of charge into a floating gate region of the cell. Consequently, each cell can store M bits, thus decreasing significantly the cost per bit in a specific production technology. The multilevel approach therefore becomes very attractive in applications such as the mass memory for portable computers, voice recorders, and digital retrieval devices (cameras), and other applications using mass memory.
In multilevel memories, on-chip circuits are required which can supply threshold voltages distributed at intervals sufficiently close and spaced, within a reduced period of time. The requirements are far more stringent than in the case of two-level memories: in particular, the broadness of distribution of each level is more critical; consequently, accurate control of the threshold voltage programmed is required.
One of the required on-chip circuits is the voltage generator, which must generate a stepped voltage for supplying the selected word line, and thus the gate terminal of the addressed cell, since there is a linear ratio between the increase in the threshold voltage
&Dgr;
V
T
and the increase in the applied gate voltage
&Dgr;
V
GP
, if the drain voltage is kept constant. In particular, as described in C. Calligaro, A. Manstretta, A. Modelli and G. Torelli: “Technological and design constraints for multilevel flash memories”.
Third IEEE Int. Conf. on Electronics, Circuits and Systems
, (ICECS), pp. 1005-1008, October 1996, the complete text of which is incorporated herein by reference, the following is obtained:
&Dgr;
V
T
=
&Dgr;
V
GP
.
For obtaining this linear ratio the increase in threshold voltage
&Dgr;
V
T
must be constant. In addition, in order to obtain distributions which are sufficiently close and spaced, it is necessary to have a high programming accuracy, which at present is obtained by alternating program steps, during which the threshold voltage is modified, and verify steps in which it is verified whether the reached threshold voltage corresponds to the required value.
In particular, during each program step, the gate terminal of the cell to be programmed is biased with a program voltage V
GP
which is higher than that of the preceding program step, as already explained, and during the verify steps, the cell to be programmed is read by feeding the gate terminal with a read voltage V
GR
which can differ considerably from the program voltage V
GP
.
FIGS. 1 and 2
show the pattern of the voltages at the gate terminal of a cell in successive program and verify steps, in two different conditions. In the first case (FIG.
1
), at the start of programming, the program or write voltage V
GP
is lower than the read voltage V
GR
(6 V); however in the second case (FIG.
2
), the program or write voltage V
GP
is higher than the read voltage V
GR
.
The word line addressed can be biased using a suitable voltage regulator, which generates the required stepped voltage, and is provided with a discharge circuit which discharges the addressed word line at the end of a program pulse. Then, the addressed word line is charged to the verify voltage through a different biasing circuit, and is then discharged once more.
The verify or program voltage can be discharged through an NMOS or PMOS discharge transistor connected to the output of the regulator, as shown in
FIGS. 3 and 4
.
In detail,
FIG. 3
shows an NMOS transistor
50
a
, arranged between an output terminal
51
of a discrete-ramp voltage generator circuit and ground, and has a gate terminal connected to the output
52
of an inverter
53
. The figure also shows with broken lines a capacitor
54
, which represents the capacitance of the selected word line. The inverter
53
is connected between a supply line set to V
DD
and a ground line, and receives a digital signal S
1
. When the digital signal S
1
is low (for example 0 V), the output
52
rises to the supply voltage value V
DD
, thus switching on the NMOS transistor
50
a
, and consequently discharging the parasitic capacitance
54
to a voltage close to 0 V.
On the other hand the circuit illustrated in
FIG. 4
shows a PMOS transistor
50
b
, and the inverter
53
is connected to the supply line V
DD
and to a reference line which is set to a voltage V
F
close to 0 V. In this case, when the digital signal S
2
becomes high, the output of the inverter
53
reaches the reference voltage V
F
. Thus, the PMOS transistor
50
b
permits discharge of the voltage present at the output terminal
51
, only down to V
F
+|V
TP
| wherein V
TP
is the threshold voltage of the PMOS transistor
50
b
, and then switches off, thus interrupting discharge.
The above-described solutions have some disadvantages. First, the manufacture of separate voltage generators for programming and reading involves a considerable space. In addition, the discharge to the ground or to a value close to ground, and subsequent charging of the addressed word line after each individual program and verify step, gives rise to a substantial consumption, and significant setting times, as a result of the high capacity associated with the word lines.
SUMMARY OF THE INVENTION
The present invention provides a voltage generator which overcomes the disadvantages of the prior art described above.
According to various aspects of the present invention, a voltage generator is provided having an output terminal supplying an output voltage that alternately switches between first and second values, the first values being greater than the second values. The voltage generator includes a charge circuit and a discharge circuit, both coupled to the output terminal. A programmable circuit is shared by the charge and discharge circuits, the programmable circuit having a programmable electrical value correlated to the first and second values of the output voltage. A control circuit coupled to the programmable circuit modifies the electrical value on the basis of required values of the output voltage.
According to one aspect of the invention, the charge circuit of the voltage generator includes a voltage regulator that generates the first and second values of the output voltage, and the discharge circuit includes a discharge circuit connected to the output terminal, which is activated when the electrical value is modified from one of the first values to one of the second values.
According to other aspects of the invention, the voltage generator additionally includes an amplifier having a first input receiving a reference value, a second input coupled to a feedback node, and an output connected to a drive element interposed between a supply line and the output terminal. The programmable circuit also includes a programmable resistive divider having a first terminal connected to the output terminal, a second terminal connected to a reference potential line, i.e., ground, and an intermediate node forming the feedback node, wherein the programmable resistive divider is formed having a programmable resistance.
According to yet other aspects of the invention, the invention provides a method for generating a voltage which is alternately switched between first and second values, wherein the first values are greater than the second values. The method includes: setting a programmable electrical value correlated to the first and second output voltage values to a first value that corresponds to a first value selected from amongst the first output voltage values; activating a voltage regulator thereby generating the first selected output voltage value; setting the programmable electrical value to a s
Khouri Osama
Micheloni Rino
Sacco Andrea
Torelli Guido
Iannucci Robert
Jorgenson Lisa K.
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
Tso Edward H.
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