Voltage generating circuit for semiconductor memory sense...

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Utility Patent

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Details

C365S205000, C365S189070, C365S149000

Utility Patent

active

06169698

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor memory which reads data according to the so-called overdrive system which drives at a higher external power supply voltage for a fixed time at the beginning of the build-up of a sense amplifier driven with an internal power supply voltage.
BACKGROUND OF THE INVENTION
In a semiconductor memory such as a DRAM, etc., along with miniaturization of the cell array, internal power supply voltage V
DL
, which is generated when external power supply voltage V
DD
is stepped down on the inside of the memory array, is often used in order to secure the gate breakdown voltage thereof. When the power supply voltage is stepped down, a decrease in the access speed cannot be avoided in a sense amplifier connected to each memory cell, so the sense amplifier drive system (hereafter referred to as overdrive OVD system) which feeds a higher external power supply voltage V
DD
for a fixed time at the beginning of the build-up (until reaching the internal operating voltage) is used.
However, step down in the voltage originating in the power line resistance according to the arrangement of the sense amplifier array cannot be ignored in said overdrive system so the optimal overdrive value of the sense amplifier differs between the sense amplifier arrays even within the same array block.
Therefore, the overdrive value is optimized based on the worst case in order to secure sufficient writing as a whole in, for example, the conventional 64 Mb (megabit) DRAM. Accurate operation of the sense amplifier in the farthest end (worst case) can be secured in accordance with this but the overdrive becomes excessive on the near end side and the excessive charge accompanying excessive overdrive was discarded. Namely, excess external power supply voltage was impressed during the memory access in the near end sense amplifier and this caused characteristic degradation of the transistor composing the sense amplifier, and unnecessary power consumption was unavoidable.
In order to suppress said unnecessary power consumption, it is necessary to minimize the overdrive value as much as possible within the range of being able to secure accurate operation of the sense amplifier at the farthest end, but in an actual DRAM, the reality was that the overdrive time was set longer than necessary in order to avoid a drop during the power change in the overdrive. Namely, the internal operating voltage (bit line voltage) of the sense amplifier array during overdrive had to be sufficiently increased to a higher voltage after reaching the voltage level sufficient for the sense amplifier, namely, to a voltage capable of avoiding a drop during the power change.
Specifically, for example, if external power supply voltage V
DD
is 3.3 V and internal power supply voltage V
DL
is 2.2 V, a voltage of about 2.0 V is necessary to be able to avoid a drop during the power change. In this case, when it is changed from external power supply voltage V
DD
to internal power supply voltage V
DL
before the bit line potential reaches 2.0 V, the level of internal power supply voltage V
DL
suddenly steps down the instant the power changes because the driving ability of the internal power generated within the chip is weaker than the external power. This drop in the power level is sensed by a generator which generates internal power supply voltage V
DL
, the generator begins stepping up the output voltage, and the feed line of internal power supply voltage V
DL
is restored to a voltage level sufficient for sense amplifier operation after a fixed time.
Conventionally, it was necessary to set a long overdrive time and to change the power after the bit line voltage of the sense amplifier has become a sufficient voltage (e.g., near 2.2 V) and after it has exceeded the voltage level capable of operating the sense amplifier in order to avoid said great drop (undershoot) in the power level. As a result, though great undershoot caused by power change could be avoided even in the sense amplifier array of the farthest end, there were problems that the overdrive time was long, it was difficult to reduce the cycle time for reading the data, and high speed data readout in the conventional OVD system readout could not be achieved.
The present invention was reacted considering said situation, and the objective is to provide a semiconductor memory for enhancing the speed by greatly suppressing the drop in the power level immediately after change when changing the power from a high external power supply voltage to a low internal power supply voltage during the activation of a sense amplifier like, for example, the overdrive system.
SUMMARY OF THE INVENTION
In order to solve said problems in the conventional technology and in accordance with one aspect of the invention the semiconductor memory of the present invention is a semiconductor memory which reads data by changing the power supply voltage feed line connected to the drive line of the sense amplifier to the feed line of internal power supply voltage from the feed line of external power supply voltage after initially activating the sense amplifier with external power supply voltage, and a voltage generating circuit which steps up the feed line voltage of said internal power supply voltage beforehand to a voltage higher than the working voltage prior to said change and restores said feed line voltage which stepped down after the change to said working voltage is connected to the feed line of said internal power supply voltage.
According to another aspect of the invention said voltage generating circuit has a detecting circuit part which detects the potential of the feed line of said internal power supply voltage, a first switching element connected between the feed line of said internal power supply voltage and the feed line of the external power supply voltage, and which is operated according to the detection result of said detecting circuit part, and a second switching element connected between the connection node of said detecting circuit part and said first switching element and the common voltage feed line, which changes the potential of said connection node by conducting according to the input voltage step up signal, and by it conducting said first switching element for a fixed time prior to said change.
Said detecting circuit part is composed of a comparing circuit which compares the partial pressure of said feed line voltage with a prescribed reference voltage and drives said first switching element according to the comparison result.
Also, a capacitor is provided which is connected between the feed line of said internal power supply voltage and the common voltage feed line, and the accumulated charge value increases as said feed line voltage is stepped up to a voltage higher than the working voltage beforehand. In order to enhance the response property by utilizing the capacitive coupling according to this capacitor, it is preferable to connect a capacitor between the potential detection node of said detecting circuit part and the feed line of said internal power voltage and between said potential detection node and common voltage feed line.
In the semiconductor memory with this type of constitution, said second switching element within the voltage producing circuit is conducted for a fixed time prior to power change. According to this conduction of the second switching element, the potential of the input node of the first switching element changes as if the potential of the feed line of the internal power supply voltage has stepped down. Therefore, the first switching element is conducted for a while and just for this period, the feed line of the internal power supply voltage steps up to a voltage higher than the working voltage connected to the feed line of the external power supply voltage. Due to the feed line of the pertinent internal power supply voltage being connected to the drive line of the sense amplifier in this state of the voltage having stepped up, even if there is a step down in the potential due to power change, the perti

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